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Documentation: x86 Enable Serial Output

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Document the steps necessary to enable serial output

TEST=None

Change-Id: Ifc0e700d7ef54fb1e28ca9bca34b94cccd3633ac
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13444
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Lee Leahy
2016-02-04 11:21:33 -08:00
committed by Leroy P Leahy
parent 7e0078b990
commit 66decf1644
4 changed files with 111 additions and 0 deletions
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44
Documentation/Intel/SoC/soc.html
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@@ -19,6 +19,11 @@
<li><a href="#EarlyDebug">Early Debug</a></li>
<li><a href="#Bootblock">Bootblock</a></li>
<li><a href="#TempRamInit">TempRamInit</a></li>
<li><a href="#Romstage">Romstage</a>
<ol type="A">
<li>Enable <a href="#SerialOutput">Serial Output"</a></li>
</ol>
</li>
</ol>
@@ -284,6 +289,45 @@ Use the following steps to debug the call to TempRamInit:
</ol>
<hr>
<h1><a name="Romstage">Romstage</a></h1>
<h2><a name="SerialOutput">Serial Output</a></h2>
<p>
The following steps add the serial output support for romstage:
</p>
<ol>
<li>Create the romstage subdirectory</li>
<li>Add romstage/romstage.c
<ol type="A">
<li>Program the necessary base addresses</li>
<li>Disable the TCO</li>
</ol>
</li>
<li>Add romstage/Makefile.inc
<ol type="A">
<li>Add romstage.c to romstage</li>
</ol>
</li>
<li>Add gpio configuration support if necessary</li>
<li>Add the necessary .h files to support the build</li>
<li>Update Makefile.inc
<ol type="A">
<li>Add the romstage subdirectory</li>
<li>Add the gpio configuration support file to romstage</li>
</ol>
</li>
<li>Set the necessary Kconfig values to enable serial output:
<ul>
<li>CONFIG_DRIVERS_UART_&lt;driver&gt;=y</li>
<li>CONFIG_CONSOLE_SERIAL=y</li>
<li>CONFIG_UART_FOR_CONSOLE=&lt;port&gt;</li>
<li>CONFIG_CONSOLE_SERIAL_115200=y</li>
</ul>
</li>
</ol>
<hr>
<p>Modified: 31 January 2016</p>
</body>