Documentation: x86 Enable Serial Output
Document the steps necessary to enable serial output TEST=None Change-Id: Ifc0e700d7ef54fb1e28ca9bca34b94cccd3633ac Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/13444 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@@ -71,6 +71,17 @@
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<li><a target="_blank" href="SoC/soc.html#EarlyDebug">Early Debug</a></li>
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<li>Implement and debug the <a target="_blank" href="SoC/soc.html#Bootblock">bootblock</a> code</li>
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<li>Implement and debug the call to <a target="_blank" href="SoC/soc.html#TempRamInit">TempRamInit</a></li>
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<li>Enable the serial port
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<ol type="A">
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<li>Power on, enable and configure GPIOs for the
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<a target="_blank" href="Board/board.html#SerialOutput">debug serial UART</a>
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</li>
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<li>Add the <a target="_blank" href="SoC/soc.html#SerialOutput">serial outupt</a>
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support to romstage
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</li>
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</ol>
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</li>
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<li>Enable <a target="_blank" href="fsp1_1.html#corebootFspDebugging">coreboot/FSP</a> debugging</li>
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</ol>
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@@ -106,6 +117,23 @@
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Disable: CONFIG_DISPLAY_MTRRS=y, MTRRs displayed after call to TempRamExit
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</td>
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</tr>
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<tr bgcolor="#c0ffc0">
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<th>Board</th>
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<th>Where</th>
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<th>Testing</th>
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</tr>
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<tr>
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<td>Serial Port</td>
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<td>
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SoC <a target="_blank" href="SoC/soc.html#SerialOutput">Support</a><br>
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Enable: src/soc/mainboard/<Board>/com_init.c/<a target="_blank" href="Board/board.html#SerialOutput">car_mainboard_pre_console_init</a>
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</td>
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<td>Debug serial output works</td>
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</tr>
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<tr bgcolor="#c0ffc0">
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<th>FSP</th>
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<th>Where</th>
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