mb/*/*/buildOpts.c: Clean up whitespace
Drop multiple blank lines and use one space inside C-style comments. TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb mainboards result in identical coreboot binaries. Change-Id: Ibe1f279dd22ae7657ea7b7766f88004dbf4dceb5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41589 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mike Banon <mikebdp2@gmail.com> Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
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@@ -9,7 +9,6 @@
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* build option selections desired for that platform.
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*
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* For Information about this file, see @ref platforminstall.
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*
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*/
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#include <AGESA.h>
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@@ -29,7 +28,6 @@
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#define INSTALL_AM3_SOCKET_SUPPORT FALSE
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#define INSTALL_FM2_SOCKET_SUPPORT FALSE
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#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
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#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
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#undef INSTALL_FT3_SOCKET_SUPPORT
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@@ -152,7 +150,7 @@
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#define BLDCFG_PROCESSOR_SCOPE_NAME1 '0'
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#define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed
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/* Process the options...
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/* Process the options...
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* This file include MUST occur AFTER the user option selection settings
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*/
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/*
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@@ -214,8 +212,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
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#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
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/* Include the files that instantiate the configuration definitions. */
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/* Include the files that instantiate the configuration definitions. */
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#include "cpuRegisters.h"
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#include "cpuFamRegisters.h"
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#include "cpuFamilyTranslation.h"
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@@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
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//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
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//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
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//
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///* QUANDRANK_TYPE*/
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///* QUANDRANK_TYPE */
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//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
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//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
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//
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@@ -9,7 +9,6 @@
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* build option selections desired for that platform.
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*
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* For Information about this file, see @ref platforminstall.
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*
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*/
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#include <AGESA.h>
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@@ -29,7 +28,6 @@
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#define INSTALL_AM3_SOCKET_SUPPORT FALSE
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#define INSTALL_FM2_SOCKET_SUPPORT FALSE
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#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
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#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
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#undef INSTALL_FT3_SOCKET_SUPPORT
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@@ -152,7 +150,7 @@
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#define BLDCFG_PROCESSOR_SCOPE_NAME1 '0'
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#define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed
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/* Process the options...
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/* Process the options...
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* This file include MUST occur AFTER the user option selection settings
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*/
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/*
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@@ -214,8 +212,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
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#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
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/* Include the files that instantiate the configuration definitions. */
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/* Include the files that instantiate the configuration definitions. */
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#include "cpuRegisters.h"
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#include "cpuFamRegisters.h"
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#include "cpuFamilyTranslation.h"
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@@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
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//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
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//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
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//
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///* QUANDRANK_TYPE*/
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///* QUANDRANK_TYPE */
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//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
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//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
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//
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