mb/*/*/buildOpts.c: Clean up whitespace

Drop multiple blank lines and use one space inside C-style comments.

TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.

Change-Id: Ibe1f279dd22ae7657ea7b7766f88004dbf4dceb5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41589
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
This commit is contained in:
Angel Pons
2020-05-20 23:34:54 +02:00
committed by Nico Huber
parent 927f6ae84a
commit 66ee42daba
25 changed files with 96 additions and 180 deletions

View File

@@ -9,7 +9,6 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <AGESA.h>
@@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT
@@ -152,7 +150,7 @@
#define BLDCFG_PROCESSOR_SCOPE_NAME1 '0'
#define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed
/* Process the options...
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
/*
@@ -214,8 +212,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h"
#include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h"
@@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
//
///* QUANDRANK_TYPE*/
///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
//

View File

@@ -9,7 +9,6 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <AGESA.h>
@@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT
@@ -152,7 +150,7 @@
#define BLDCFG_PROCESSOR_SCOPE_NAME1 '0'
#define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed
/* Process the options...
/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
/*
@@ -214,8 +212,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h"
#include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h"
@@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
//
///* QUANDRANK_TYPE*/
///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
//