mb/*/*/buildOpts.c: Clean up whitespace
Drop multiple blank lines and use one space inside C-style comments. TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb mainboards result in identical coreboot binaries. Change-Id: Ibe1f279dd22ae7657ea7b7766f88004dbf4dceb5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41589 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mike Banon <mikebdp2@gmail.com> Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
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@@ -9,19 +9,15 @@
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* build option selections desired for that platform.
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*
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* For Information about this file, see @ref platforminstall.
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*
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*/
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/* Select the CPU family. */
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/* Select the CPU family. */
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#define INSTALL_FAMILY_10_SUPPORT FALSE
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#define INSTALL_FAMILY_12_SUPPORT FALSE
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#define INSTALL_FAMILY_14_SUPPORT TRUE
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#define INSTALL_FAMILY_15_SUPPORT FALSE
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/* Select the CPU socket type. */
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/* Select the CPU socket type. */
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#define INSTALL_G34_SOCKET_SUPPORT FALSE
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#define INSTALL_C32_SOCKET_SUPPORT FALSE
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#define INSTALL_S1G3_SOCKET_SUPPORT FALSE
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@@ -86,7 +82,6 @@
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#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
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#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
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#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
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#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
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@@ -207,7 +202,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
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{ CPU_LIST_TERMINAL }
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};
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/* Include the files that instantiate the configuration definitions. */
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/* Include the files that instantiate the configuration definitions. */
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#include "cpuRegisters.h"
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#include "cpuFamRegisters.h"
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@@ -253,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
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#define DDR1866_FREQUENCY 933 ///< DDR 1866
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#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
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/* QUANDRANK_TYPE*/
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/* QUANDRANK_TYPE */
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#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
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#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
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@@ -9,19 +9,15 @@
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* build option selections desired for that platform.
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*
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* For Information about this file, see @ref platforminstall.
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*
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*/
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/* Select the CPU family. */
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/* Select the CPU family. */
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#define INSTALL_FAMILY_10_SUPPORT FALSE
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#define INSTALL_FAMILY_12_SUPPORT FALSE
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#define INSTALL_FAMILY_14_SUPPORT TRUE
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#define INSTALL_FAMILY_15_SUPPORT FALSE
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/* Select the CPU socket type. */
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/* Select the CPU socket type. */
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#define INSTALL_G34_SOCKET_SUPPORT FALSE
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#define INSTALL_C32_SOCKET_SUPPORT FALSE
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#define INSTALL_S1G3_SOCKET_SUPPORT FALSE
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@@ -86,7 +82,6 @@
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#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
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#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
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#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
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#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
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@@ -207,7 +202,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
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{ CPU_LIST_TERMINAL }
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};
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/* Include the files that instantiate the configuration definitions. */
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/* Include the files that instantiate the configuration definitions. */
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#include "cpuRegisters.h"
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#include "cpuFamRegisters.h"
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@@ -253,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
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#define DDR1866_FREQUENCY 933 ///< DDR 1866
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#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
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/* QUANDRANK_TYPE*/
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/* QUANDRANK_TYPE */
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#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
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#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
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