mb/google/rex: Add memory init
Add memory init with placeholder to fill in required memory configuration parameters. DQ map and Rcomp can be auto probed by the FSP-M hence, kept it as default. BUG=b:224325352 TEST=util/abuild/abuild -p none -t google/rex -a -c max Able to boot till FSP-M/MRC using MTL simics. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I5baa87411c28a20602eb5a7077f00664ccab3ade Reviewed-on: https://review.coreboot.org/c/coreboot/+/64850 Reviewed-by: Tarun Tuli <taruntuli@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
@@ -10,6 +10,7 @@ config BOARD_GOOGLE_BASEBOARD_REX
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_ESPI
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select EC_GOOGLE_CHROMEEC_ESPI
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select MAINBOARD_HAS_CHROMEOS
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select MAINBOARD_HAS_CHROMEOS
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select MEMORY_SOLDERDOWN
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select SOC_INTEL_METEORLAKE
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select SOC_INTEL_METEORLAKE
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select SYSTEM_TYPE_LAPTOP
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select SYSTEM_TYPE_LAPTOP
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@@ -44,4 +45,12 @@ config VARIANT_DIR
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string
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string
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default "rex0" if BOARD_GOOGLE_REX0
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default "rex0" if BOARD_GOOGLE_REX0
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config DIMM_SPD_SIZE
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default 512
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config MEMORY_SOLDERDOWN
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def_bool n
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select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS
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select HAVE_SPD_IN_CBFS
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endif # BOARD_GOOGLE_REX_COMMON
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endif # BOARD_GOOGLE_REX_COMMON
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@@ -16,6 +16,8 @@ BASEBOARD_DIR:=$(call strip_quotes,$(CONFIG_BASEBOARD_DIR))
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subdirs-y += variants/baseboard/$(BASEBOARD_DIR)
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subdirs-y += variants/baseboard/$(BASEBOARD_DIR)
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subdirs-y += variants/$(VARIANT_DIR)
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subdirs-y += variants/$(VARIANT_DIR)
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subdirs-y += variants/$(VARIANT_DIR)/memory
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subdirs-$(CONFIG_HAVE_SPD_IN_CBFS) += spd
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/$(BASEBOARD_DIR)/include
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/$(BASEBOARD_DIR)/include
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@@ -3,12 +3,21 @@
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#include <baseboard/variants.h>
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#include <baseboard/variants.h>
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#include <fsp/api.h>
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#include <fsp/api.h>
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#include <soc/romstage.h>
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#include <soc/romstage.h>
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#include <string.h>
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void mainboard_memory_init_params(FSPM_UPD *memupd)
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void mainboard_memory_init_params(FSPM_UPD *memupd)
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{
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{
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const struct pad_config *pads;
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const struct pad_config *pads;
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size_t pads_num;
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size_t pads_num;
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const struct mb_cfg *mem_config = variant_memory_params();
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bool half_populated = variant_is_half_populated();
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struct mem_spd spd_info;
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pads = variant_romstage_gpio_table(&pads_num);
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pads = variant_romstage_gpio_table(&pads_num);
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gpio_configure_pads(pads, pads_num);
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gpio_configure_pads(pads, pads_num);
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memset(&spd_info, 0, sizeof(spd_info));
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variant_get_spd_info(&spd_info);
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memcfg_init(memupd, mem_config, &spd_info, half_populated);
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}
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}
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6
src/mainboard/google/rex/spd/Makefile.inc
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6
src/mainboard/google/rex/spd/Makefile.inc
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@@ -0,0 +1,6 @@
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## SPDX-License-Identifier: GPL-2.0-or-later
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##
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ifneq ($(SPD_SOURCES),)
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LIB_SPD_DEPS := $(SPD_SOURCES)
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endif
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@@ -4,6 +4,7 @@
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#define __BASEBOARD_VARIANTS_H__
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#define __BASEBOARD_VARIANTS_H__
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#include <soc/gpio.h>
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#include <soc/gpio.h>
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#include <soc/meminit.h>
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#include <stdint.h>
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#include <stdint.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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@@ -15,4 +16,9 @@ const struct pad_config *variant_gpio_table(size_t *num);
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const struct pad_config *variant_early_gpio_table(size_t *num);
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const struct pad_config *variant_early_gpio_table(size_t *num);
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const struct pad_config *variant_romstage_gpio_table(size_t *num);
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const struct pad_config *variant_romstage_gpio_table(size_t *num);
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const struct mb_cfg *variant_memory_params(void);
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void variant_get_spd_info(struct mem_spd *spd_info);
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int variant_memory_sku(void);
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bool variant_is_half_populated(void);
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#endif /*__BASEBOARD_VARIANTS_H__ */
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#endif /*__BASEBOARD_VARIANTS_H__ */
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@@ -1,5 +1,6 @@
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bootblock-y += gpio.c
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bootblock-y += gpio.c
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romstage-y += gpio.c
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romstage-y += gpio.c
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romstage-y += memory.c
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ramstage-y += gpio.c
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ramstage-y += gpio.c
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32
src/mainboard/google/rex/variants/baseboard/rex/memory.c
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32
src/mainboard/google/rex/variants/baseboard/rex/memory.c
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@@ -0,0 +1,32 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/gpio.h>
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#include <baseboard/variants.h>
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#include <gpio.h>
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static const struct mb_cfg baseboard_memcfg = {
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.type = MEM_TYPE_LP5X,
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/* TODO: Add Memory configuration */
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.ect = 1, /* Enable Early Command Training */
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};
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const struct mb_cfg *__weak variant_memory_params(void)
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{
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return &baseboard_memcfg;
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}
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int __weak variant_memory_sku(void)
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{
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return 0;
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}
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bool __weak variant_is_half_populated(void)
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{
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return 0;
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}
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void __weak variant_get_spd_info(struct mem_spd *spd_info)
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{
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spd_info->topo = MEM_TOPO_MEMORY_DOWN;
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spd_info->cbfs_index = variant_memory_sku();
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}
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@@ -0,0 +1,5 @@
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# SPDX-License-Identifier: GPL-2.0-or-later
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# This is an auto-generated file. Do not edit!!
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SPD_SOURCES =
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SPD_SOURCES += spd/lp5/set-0/spd-empty.hex # ID = 0(0b0000)
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@@ -0,0 +1,5 @@
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# SPDX-License-Identifier: GPL-2.0-or-later
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# This is an auto-generated file. Do not edit!!
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DRAM Part Name ID to assign
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empty 0 (0000)
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@@ -0,0 +1 @@
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empty
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