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Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3887 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Stefan Reinauer
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Stefan Reinauer
Stefan Reinauer
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54309d637a
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679c9f9299
316
src/southbridge/intel/i82801gx/i82801gx_azalia.c
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316
src/southbridge/intel/i82801gx/i82801gx_azalia.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <arch/io.h>
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#include <delay.h>
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#include "i82801gx.h"
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#define HDA_ICII_REG 0x68
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#define HDA_ICII_BUSY (1 << 0)
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#define HDA_ICII_VALID (1 << 1)
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static int set_bits(u8 * port, u32 mask, u32 val)
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{
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u32 dword;
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int count;
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val &= mask;
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dword = readl(port);
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dword &= ~mask;
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dword |= val;
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writel(dword, port);
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count = 50;
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do {
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dword = readl(port);
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dword &= mask;
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udelay(100);
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} while ((dword != val) && --count);
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if (!count)
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return -1;
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udelay(540);
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return 0;
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}
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static int codec_detect(u8 * base)
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{
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u32 dword;
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/* 1 */
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set_bits(base + 0x08, 1, 1);
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/* 2 */
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dword = readl(base + 0x0e);
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dword |= 7;
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writel(dword, base + 0x0e);
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/* 3 */
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set_bits(base + 0x08, 1, 0);
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/* 4 */
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set_bits(base + 0x08, 1, 1);
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/* 5 */
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dword = readl(base + 0xe);
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dword &= 7;
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/* 6 */
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if (!dword) {
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set_bits(base + 0x08, 1, 0);
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printk_debug("No codec!\n");
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return 0;
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}
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return dword;
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}
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static u32 cim_verb_data[] = {
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0x00172000,
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0x00172100,
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0x001722EC,
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0x00172310,
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/* Pin Complex (NID 0x12) */
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0x01271CF0,
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0x01271D11,
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0x01271E11,
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0x01271F41,
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/* Pin Complex (NID 0x14) */
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0x01471C10,
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0x01471D01,
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0x01471E13,
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0x01471F99,
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/* Pin Complex (NID 0x15) */
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0x01571C20,
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0x01571D40,
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0x01571E21,
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0x01571F01,
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/* Pin Complex (NID 0x16) */
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0x01671CF0,
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0x01671D11,
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0x01671E11,
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0x01671F41,
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/* Pin Complex (NID 0x18) */
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0x01871C30,
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0x01871D98,
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0x01871EA1,
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0x01871F01,
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/* Pin Complex (NID 0x19) */
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0x01971C31,
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0x01971D09,
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0x01971EA3,
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0x01971F99,
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/* Pin Complex (NID 0x1A) */
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0x01A71C3F,
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0x01A71D98,
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0x01A71EA1,
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0x01A71F02,
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/* Pin Complex (NID 0x1B) */
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0x01B71C1F,
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0x01B71D40,
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0x01B71E21,
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0x01B71F02,
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/* Pin Complex (NID 0x1C) */
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0x01C71CF0,
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0x01C71D11,
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0x01C71E11,
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0x01C71F41,
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/* Pin Complex (NID 0x1D) */
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0x01D71CF0,
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0x01D71D11,
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0x01D71E11,
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0x01D71F41,
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/* Pin Complex (NID 0x1E) */
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0x01E71CF0,
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0x01E71D11,
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0x01E71E11,
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0x01E71F41,
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/* Pin Complex (NID 0x1F) */
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0x01F71CF0,
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0x01F71D11,
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0x01F71E11,
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0x01F71F41,
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};
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static unsigned find_verb(u32 viddid, u32 ** verb)
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{
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device_t azalia_dev = dev_find_slot(0, PCI_DEVFN(0x14, 2));
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struct southbridge_intel_i82801gx_config *cfg =
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(struct southbridge_intel_i82801gx_config *)azalia_dev->chip_info;
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printk_debug("Dev=%s\n", dev_path(azalia_dev));
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printk_debug("Default viddid=%x\n", cfg->hda_viddid);
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printk_debug("Reading viddid=%x\n", viddid);
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if (!cfg)
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return 0;
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if (viddid != cfg->hda_viddid)
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return 0;
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*verb = (u32 *) cim_verb_data;
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return sizeof(cim_verb_data) / sizeof(u32);
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}
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/**
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* Wait 50usec for for the codec to indicate it is ready
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* no response would imply that the codec is non-operative
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*/
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static int wait_for_ready(u8 *base)
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{
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/* Use a 50 usec timeout - the Linux kernel uses the
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* same duration */
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int timeout = 50;
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while(timeout--) {
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u32 dword=readl(base + HDA_ICII_REG);
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if (!(dword & HDA_ICII_BUSY))
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return 0;
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udelay(1);
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}
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return -1;
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}
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/**
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* Wait 50usec for for the codec to indicate that it accepted
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* the previous command. No response would imply that the code
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* is non-operative
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*/
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static int wait_for_valid(u8 *base)
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{
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/* Use a 50 usec timeout - the Linux kernel uses the
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* same duration */
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int timeout = 50;
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while(timeout--) {
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u32 dword = readl(base + HDA_ICII_REG);
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if ((dword & (HDA_ICII_VALID | HDA_ICII_BUSY)) ==
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HDA_ICII_VALID)
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return 0;
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udelay(1);
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}
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return 1;
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}
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static void codec_init(u8 * base, int addr)
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{
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u32 dword;
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u32 *verb;
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u32 verb_size;
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int i;
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/* 1 */
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if (wait_for_ready(base) == -1)
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return;
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dword = (addr << 28) | 0x000f0000;
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writel(dword, base + 0x60);
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if (wait_for_valid(base) == -1)
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return;
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dword = readl(base + 0x64);
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/* 2 */
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printk_debug("codec viddid: %08x\n", dword);
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verb_size = find_verb(dword, &verb);
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if (!verb_size) {
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printk_debug("No verb!\n");
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return;
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}
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printk_debug("verb_size: %d\n", verb_size);
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/* 3 */
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for (i = 0; i < verb_size; i++) {
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if (wait_for_ready(base) == -1)
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return;
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writel(verb[i], base + 0x60);
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if (wait_for_valid(base) == -1)
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return;
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}
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printk_debug("verb loaded!\n");
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}
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static void codecs_init(u8 * base, u32 codec_mask)
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{
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int i;
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for (i = 2; i >= 0; i--) {
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if (codec_mask & (1 << i))
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codec_init(base, i);
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}
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}
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static void azalia_init(struct device *dev)
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{
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u8 *base;
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struct resource *res;
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u32 codec_mask;
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/* Set routing pin */
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pci_write_config32(dev, 0xf8, 0x0);
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pci_write_config8(dev, 0xfc, 0xAA);
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/* Set INTA */
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pci_write_config8(dev, 0x63, 0x0);
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/* Enable azalia, disable ac97 */
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// pm_iowrite(0x59, 0xB);
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res = find_resource(dev, 0x10);
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if (!res)
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return;
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base = (u8 *) ((u32)res->base);
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printk_debug("base = %08x\n", base);
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codec_mask = codec_detect(base);
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if (codec_mask) {
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printk_debug("codec_mask = %02x\n", codec_mask);
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codecs_init(base, codec_mask);
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}
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}
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static struct device_operations azalia_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = azalia_init,
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.scan_bus = 0,
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.enable = i82801gx_enable,
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};
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/* 82801GB/GR/GDH/GBM/GHM (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH) */
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static const struct pci_driver i82801gx_azalia __pci_driver = {
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.ops = &azalia_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = 0x27d8,
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};
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