sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ACPI: Obsolete FADT p_lvl2_lat and p_lvl3_lat fields

Browse Source 
After the obsoletion of Processor() it is necessary to provide
_CST package to define P_LVLx IO addresses for C2/C3 transitions.
The latency values from _CST will always replace those in FADT.

Change-Id: I3230be719659fe9cdf9ed6ae73bc91b05093ab97
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74430
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Kyösti Mälkki
2023-04-14 10:20:03 +03:00
parent 88fefd4feb
commit 67c48a3677
13 changed files with 4 additions and 39 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/soc/amd/cezanne/acpi.c
View File

@@ -69,10 +69,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_regs(fadt);
/* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are
overridden by the _CST packages in the processor devices. */
fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
fadt->day_alrm = RTC_DATE_ALARM;
fadt->century = RTC_ALT_CENTURY;
fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */

4
src/soc/amd/glinda/acpi.c
View File

@@ -72,10 +72,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_regs(fadt);
/* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are
overridden by the _CST packages in the processor devices. */
fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
fadt->day_alrm = RTC_DATE_ALARM;
fadt->century = RTC_ALT_CENTURY;
fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */

4
src/soc/amd/mendocino/acpi.c
View File

@@ -71,10 +71,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_regs(fadt);
/* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are
overridden by the _CST packages in the processor devices. */
fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
fadt->day_alrm = RTC_DATE_ALARM;
fadt->century = RTC_ALT_CENTURY;
fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */

4
src/soc/amd/phoenix/acpi.c
View File

@@ -72,10 +72,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_regs(fadt);
/* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are
overridden by the _CST packages in the processor devices. */
fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
fadt->day_alrm = RTC_DATE_ALARM;
fadt->century = RTC_ALT_CENTURY;
fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */

4
src/soc/amd/picasso/acpi.c
View File

@@ -77,10 +77,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_regs(fadt);
/* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are
overridden by the _CST packages in the processor devices. */
fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
fadt->day_alrm = RTC_DATE_ALARM;
fadt->iapc_boot_arch = cfg->fadt_boot_arch; /* legacy free default */
fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */

4
src/soc/amd/stoneyridge/acpi.c
View File

@@ -71,10 +71,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fill_fadt_extended_pm_regs(fadt);
/* p_lvl2_lat and p_lvl3_lat match what the AGESA code does, but those values are
overridden by the _CST packages in the PSTATE SSDT. */
fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */
fadt->duty_width = 3; /* CLK_VAL bits 3:1 */
fadt->day_alrm = RTC_DATE_ALARM;