nb/intel/sandybridge: Add a chipset devicetree
This only moves CPU configuration to a common place. Other PCI devices can be done in follow-ups. Change-Id: I9c5b6f25b779e28b6719cf70455ff0f1a916ad87 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56912 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Martin L Roth
parent
6cecb0d963
commit
691d58f999
@@ -17,6 +17,9 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS
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select NO_DDR2
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select USE_DDR3
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config CHIPSET_DEVICETREE
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default "northbridge/intel/sandybridge/chipset.cb"
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config SANDYBRIDGE_VBOOT_IN_ROMSTAGE
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bool
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default n
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18
src/northbridge/intel/sandybridge/chipset.cb
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18
src/northbridge/intel/sandybridge/chipset.cb
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@@ -0,0 +1,18 @@
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# SPDX-License-Identifier: GPL-2.0-only
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chip northbridge/intel/sandybridge
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device cpu_cluster 0 on
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chip cpu/intel/model_206ax
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# Magic APIC ID to locate this chip
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device lapic 0 on end
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device lapic 0xacac off end
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register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1)
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register "acpi_c2" = "3" # ACPI(C2) = MWAIT(C3)
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register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7)
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end
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end
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device domain 0 on
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end
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end
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