Rename __attribute__((packed)) --> __packed

Also unify __attribute__ ((..)) to __attribute__((..)) and
handle ((__packed__)) like ((packed))

Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/15921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/cpu/allwinner/a10/clock.h

@@ -23,6 +23,7 @@
 
 #include "memmap.h"
 #include <types.h>
+#include <compiler.h>
 
 /* CPU_AHB_APB0 config values */
 #define CPU_CLK_SRC_MASK		(3 << 16)
@@ -267,7 +268,7 @@ struct a10_ccm {
 	u32 mali_clk_cfg;	/* 0x154 */
 	u8 res7[0x4];
 	u32 mbus_clk_cfg;	/* 0x15c */
-} __attribute__ ((packed));
+} __packed;
 
 void a1x_periph_clock_enable(enum a1x_clken periph);
 void a1x_periph_clock_disable(enum a1x_clken periph);

src/cpu/allwinner/a10/gpio.h

@@ -19,6 +19,7 @@
 #define __CPU_ALLWINNER_A10_PINMUX_H
 
 #include <types.h>
+#include <compiler.h>
 
 #define GPIO_BASE		 0x01C20800
 
@@ -42,7 +43,7 @@ struct a10_gpio_port {
 	u32 dat;
 	u32 drv[2];
 	u32 pul[2];
-} __attribute__ ((packed));
+} __packed;
 
 struct a10_gpio {
 	struct a10_gpio_port port[10];
@@ -58,7 +59,7 @@ struct a10_gpio {
 
 	u32 sdr_pad_drv;
 	u32 sdr_pad_pul;
-} __attribute__ ((packed));
+} __packed;
 
 /* gpio.c */
 void gpio_set(u8 port, u8 pin);

src/cpu/allwinner/a10/timer.h

@@ -23,6 +23,7 @@
 
 #include "memmap.h"
 #include <types.h>
+#include <compiler.h>
 
 /* TMRx_CTRL values */
 #define TIMER_CTRL_MODE_SINGLE		(1 << 7)
@@ -48,7 +49,7 @@ struct a1x_timer {
 	u32 interval;
 	u32 val;
 	u8 res[4];
-} __attribute__ ((packed));
+} __packed;
 
 /* Audio video sync*/
 struct a1x_avs {
@@ -56,27 +57,27 @@ struct a1x_avs {
 	u32 cnt0;		/* 0x84 */
 	u32 cnt1;		/* 0x88 */
 	u32 div;		/* 0x8c */
-} __attribute__ ((packed));
+} __packed;
 
 /* Watchdog */
 struct a1x_wdog {
 	u32 ctrl;		/* 0x90 */
 	u32 mode;		/* 0x94 */
-} __attribute__ ((packed));
+} __packed;
 
 /* 64 bit counter */
 struct a1x_64cnt {
 	u32 ctrl;		/* 0xa0 */
 	u32 lo;			/* 0xa4 */
 	u32 hi;			/* 0xa8 */
-} __attribute__ ((packed));
+} __packed;
 
 /* Rtc */
 struct a1x_rtc {
 	u32 ctrl;		/* 0x100 */
 	u32 yymmdd;		/* 0x104 */
 	u32 hhmmss;		/* 0x108 */
-} __attribute__ ((packed));
+} __packed;
 
 /* Alarm */
 struct a1x_alarm {
@@ -85,7 +86,7 @@ struct a1x_alarm {
 	u32 en;			/* 0x114 */
 	u32 irq_en;		/* 0x118 */
 	u32 irq_sta;		/* 0x11c */
-} __attribute__ ((packed));
+} __packed;
 
 struct a1x_timer_module {
 	u32 irq_en;		/* 0x00 */
@@ -103,7 +104,7 @@ struct a1x_timer_module {
 	u32 gp_data[4];
 	u8 res5[8];
 	u32 cpu_cfg;
-} __attribute__ ((packed));
+} __packed;
 
 u8 a1x_get_cpu_chip_revision(void);
 

src/cpu/allwinner/a10/uart.h

@@ -26,6 +26,7 @@
 #define CPU_ALLWINNER_A10_UART_H
 
 #include <types.h>
+#include <compiler.h>
 
 struct a10_uart {
 	union {
@@ -71,7 +72,7 @@ struct a10_uart {
 	u8 reserved_0xa0[4];
 	u32 halt;		/* Halt register */
 
-} __attribute__ ((packed));
+} __packed;
 
 enum uart_parity {
 	UART_PARITY_NONE,

src/cpu/amd/family_10h-family_15h/init_cpus.c

@@ -231,7 +231,7 @@ static inline int lapic_remote_read(int apicid, int reg, u32 *pvalue)
 static void init_fidvid_ap(u32 apicid, u32 nodeid, u32 coreid);
 #endif
 
-static inline __attribute__ ((always_inline))
+static inline __attribute__((always_inline))
 void print_apicid_nodeid_coreid(u32 apicid, struct node_core_id id,
 				const char *str)
 {

src/cpu/amd/model_fxx/init_cpus.c

@@ -144,7 +144,7 @@ static inline int lapic_remote_read(int apicid, int reg, u32 *pvalue)
 static void init_fidvid_ap(u32 bsp_apicid, u32 apicid);
 #endif
 
-static inline __attribute__ ((always_inline))
+static inline __attribute__((always_inline))
 void print_apicid_nodeid_coreid(u32 apicid, struct node_core_id id,
 				const char *str)
 {

src/cpu/amd/model_fxx/microcode_blob.c

@@ -11,7 +11,7 @@
  * GNU General Public License for more details.
  */
 
-unsigned char microcode[] __attribute__ ((aligned(16))) = {
+unsigned char microcode[] __attribute__((aligned(16))) = {
 #if !IS_ENABLED(CONFIG_K8_REV_F_SUPPORT)
 #include "../../../../3rdparty/blobs/cpu/amd/model_fxx/microcode.h"
 #endif

src/cpu/intel/smm/gen1/smmrelocate.c

@@ -18,6 +18,7 @@
 
 #include <types.h>
 #include <string.h>
+#include <compiler.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <cpu/cpu.h>
@@ -40,7 +41,7 @@ struct ied_header {
 	char signature[10];
 	u32 size;
 	u8 reserved[34];
-} __attribute__ ((packed));
+} __packed;
 
 
 struct smm_relocation_params {

src/cpu/ti/am335x/clock.h

@@ -16,6 +16,7 @@
 #define __CPU_TI_AM335X_CLOCK_H__
 
 #include <stdint.h>
+#include <compiler.h>
 
 enum {
 	CM_ST_NO_SLEEP = 0x0,
@@ -106,7 +107,7 @@ struct am335x_cm_per_regs {
 	uint32_t lcdc_st;		// 0x148
 	uint32_t clkdiv32k;		// 0x14c
 	uint32_t clk_24mhz_st;		// 0x150
-} __attribute__((packed));
+} __packed;
 static struct am335x_cm_per_regs * const am335x_cm_per = (void *)0x44e00000;
 
 /* Clock module wakeup registers */
@@ -166,7 +167,7 @@ struct am335x_cm_wkup_regs {
 	uint8_t _rsv0[4];		// 0xd0-0xd3
 	uint32_t wkup_wdt1;		// 0xd4
 	uint32_t div_m6_dpll_core;	// 0xd8
-} __attribute__((packed));
+} __packed;
 static struct am335x_cm_wkup_regs * const am335x_cm_wkup = (void *)0x44e00400;
 
 /* Clock module pll registers */
@@ -187,20 +188,20 @@ struct am335x_cm_dpll_regs {
 	uint32_t clksel_lcdc_pixel_clk;	// 0x34
 	uint32_t clksel_wdt1_clk;	// 0x38
 	uint32_t clksel_gpio0_dbclk;	// 0x3c
-} __attribute__((packed));
+} __packed;
 static struct am335x_cm_dpll_regs * const am335x_cm_dpll = (void *)0x44e00500;
 
 /* Clock module mpu registers */
 struct am335x_cm_mpu_regs {
 	uint32_t st;			// 0x0
 	uint32_t mpu;			// 0x4
-} __attribute__((packed));
+} __packed;
 static struct am335x_cm_mpu_regs * const am335x_cm_mpu = (void *)0x44e00600;
 
 /* Clock module device registers */
 struct am335x_cm_device_regs {
 	uint32_t cm_clkout_ctrl;	// 0x0
-} __attribute__((packed));
+} __packed;
 static struct am335x_cm_device_regs * const am335x_cm_device =
 		(void *)0x44e00700;
 
@@ -208,7 +209,7 @@ static struct am335x_cm_device_regs * const am335x_cm_device =
 struct am335x_cm_rtc_regs {
 	uint32_t rtc;			// 0x0
 	uint32_t st;			// 0x4
-} __attribute__((packed));
+} __packed;
 static struct am335x_cm_rtc_regs * const am335x_cm_rtc = (void *)0x44e00800;
 
 /* Clock module graphics controller registers */
@@ -219,7 +220,7 @@ struct am335x_cm_gfx_regs {
 	uint32_t l4ls_gfx_st;		// 0xc
 	uint32_t mmucfg;		// 0x10
 	uint32_t mmudata;		// 0x14
-} __attribute__((packed));
+} __packed;
 static struct am335x_cm_gfx_regs * const am335x_cm_gfx = (void *)0x44e00900;
 
 /* Clock module efuse registers */
@@ -227,7 +228,7 @@ struct am335x_cm_cefuse_regs {
 	uint32_t st;			// 0x0
 	uint8_t _rsv0[0x1c];		// 0x4-0x1f
 	uint32_t cefuse;		// 0x20
-} __attribute__((packed));
+} __packed;
 static struct am335x_cm_cefuse_regs * const am335x_cm_cefuse =
 		(void *)0x44e00a00;
 

src/cpu/ti/am335x/gpio.h

@@ -16,6 +16,7 @@
 #define __CPU_TI_AM335X_GPIO_H__
 
 #include <stdint.h>
+#include <compiler.h>
 
 enum {
 	AM335X_GPIO_BITS_PER_BANK = 32
@@ -53,7 +54,7 @@ struct am335x_gpio_regs {
 	uint8_t _rsv4[0x38];		// 0x158-0x18f
 	uint32_t cleardataout;		// 0x190
 	uint32_t setdataout;		// 0x194
-} __attribute__((packed));
+} __packed;
 
 static struct am335x_gpio_regs * const am335x_gpio_banks[] = {
 	(void *)0x44e07000, (void *)0x4804c000,

src/cpu/ti/am335x/header.c

@@ -15,6 +15,7 @@
 #include <stddef.h>
 #include <stdint.h>
 #include <symbols.h>
+#include <compiler.h>
 
 #include "header.h"
 
@@ -25,7 +26,7 @@ struct config_headers {
 
 	// An inert instance of chsettings.
 	struct configuration_header_settings chsettings;
-} __attribute__((packed));
+} __packed;
 
 struct omap_image_headers {
 	union {

src/cpu/ti/am335x/header.h

@@ -16,6 +16,7 @@
 #define __CPU_TI_AM335X_HEADER_H
 
 #include <stdint.h>
+#include <compiler.h>
 
 struct configuration_header_toc_item {
 	// Offset from the start address of the TOC to the actual address of
@@ -30,7 +31,7 @@ struct configuration_header_toc_item {
 
 	// 12-character name of a section, including the zero (\0) terminator.
 	char filename[12];
-} __attribute__((packed));
+} __packed;
 
 struct configuration_header_settings {
 	// Key used for section verification.
@@ -49,7 +50,7 @@ struct configuration_header_settings {
 
 	// Flags. It's not clear what this is used for.
 	uint32_t flags;
-} __attribute__((packed));
+} __packed;
 
 struct gp_device_header {
 	// Size of the image.
@@ -57,6 +58,6 @@ struct gp_device_header {
 
 	// Address to store the image/code entry point.
 	uint32_t destination;
-} __attribute__((packed));
+} __packed;
 
 #endif

src/cpu/ti/am335x/uart.h

@@ -15,6 +15,8 @@
 #ifndef AM335X_UART_H
 #define AM335X_UART_H
 
+#include <compiler.h>
+
 #define AM335X_UART0_BASE	0x44e09000
 #define AM335X_UART1_BASE	0x48020000
 #define AM335X_UART2_BASE	0x48024000
@@ -168,6 +170,6 @@ struct am335x_uart {
 	uint8_t rsvd_0x82[2];
 	uint16_t txdma;			/* TX DMA threshold */
 
-} __attribute__((packed));
+} __packed;
 
 #endif	/* AM335X_UART_H */

src/cpu/x86/mp_init.c

@@ -16,6 +16,7 @@
 
 #include <console/console.h>
 #include <stdint.h>
+#include <compiler.h>
 #include <rmodule.h>
 #include <arch/cpu.h>
 #include <cpu/cpu.h>
@@ -103,14 +104,14 @@ struct sipi_params {
 	uint32_t msr_count;
 	uint32_t c_handler;
 	atomic_t ap_count;
-} __attribute__((packed));
+} __packed;
 
 /* This also needs to match the assembly code for saved MSR encoding. */
 struct saved_msr {
 	uint32_t index;
 	uint32_t lo;
 	uint32_t hi;
-} __attribute__((packed));
+} __packed;
 
 
 /* The sipi vector rmodule is included in the ramstage using 'objdump -B'. */

src/cpu/x86/pae/pgtbl.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <compiler.h>
 #include <console/console.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/pae.h>
@@ -59,14 +60,14 @@ void *map_2M_page(unsigned long page)
 	struct pde {
 		uint32_t addr_lo;
 		uint32_t addr_hi;
-	} __attribute__ ((packed));
+	} __packed;
 	struct pg_table {
 		struct pde pd[2048];
 		struct pde pdp[512];
-	} __attribute__ ((packed));
+	} __packed;
 
 	static struct pg_table pgtbl[CONFIG_MAX_CPUS]
-		__attribute__ ((aligned(4096)));
+		__attribute__((aligned(4096)));
 	static unsigned long mapped_window[CONFIG_MAX_CPUS];
 	unsigned long index;
 	unsigned long window;

src/cpu/x86/smm/smihandler.c

@@ -28,7 +28,7 @@ static int do_driver_init = 1;
 typedef enum { SMI_LOCKED, SMI_UNLOCKED } smi_semaphore;
 
 /* SMI multiprocessing semaphore */
-static __attribute__ ((aligned(4))) volatile smi_semaphore smi_handler_status
+static __attribute__((aligned(4))) volatile smi_semaphore smi_handler_status
 	= SMI_UNLOCKED;
 
 static int smi_obtain_lock(void)

src/cpu/x86/smm/smm_module_handler.c

@@ -28,7 +28,7 @@ typedef enum { SMI_LOCKED, SMI_UNLOCKED } smi_semaphore;
 
 /* SMI multiprocessing semaphore */
 static volatile
-__attribute__ ((aligned(4))) smi_semaphore smi_handler_status = SMI_UNLOCKED;
+__attribute__((aligned(4))) smi_semaphore smi_handler_status = SMI_UNLOCKED;
 
 static int smi_obtain_lock(void)
 {

src/cpu/x86/smm/smm_module_loader.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <compiler.h>
 #include <string.h>
 #include <rmodule.h>
 #include <cpu/x86/smm.h>
@@ -47,7 +48,7 @@ struct smm_stub_params {
 	u32 fxsave_area;
 	u32 fxsave_area_size;
 	struct smm_runtime runtime;
-} __attribute__ ((packed));
+} __packed;
 
 /*
  * The stub is the entry point that sets up protected mode and stacks for each
@@ -67,7 +68,7 @@ extern unsigned char _binary_smmstub_start[];
 struct smm_entry_ins {
 	char jmp_rel;
 	uint16_t rel16;
-} __attribute__ ((packed));
+} __packed;
 
 /*
  * Place the entry instructions for num entries beginning at entry_start with