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make early serial console support more generic

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This patch makes pre-RAM serial init more generic, particularly for
platforms which do not necessarily need cache-as-RAM in order to use
the serial console and do not have a standard 8250 serial port.

This adds a Kconfig variable to set romstage-* for very early serial
console init. The current method assumes that cache-as-RAM should
enable this, so to maintain compatibility selecting CACHE_AS_RAM will
also select EARLY_SERIAL_CONSOLE.

The UART code structure needs some rework, but the use of ROMCC,
romstage, and then ramstage makes things complex.

uart.h now includes all .h files for all uarts. All 2 of them.
This is actually a simplifying change.

Change-Id: I089e7af633c227baf3c06c685f005e9d0e4b38ce
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2086
Tested-by: build bot (Jenkins)
This commit is contained in:
David Hendricks
2012-12-31 17:28:43 -08:00
committed by Ronald G. Minnich
parent 10c90d3126
commit 6a503b6a0f
9 changed files with 33 additions and 12 deletions
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7
src/console/Kconfig
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@@ -5,6 +5,13 @@ config SERIAL_CONSOLE
help
Send coreboot debug output to a serial port
config EARLY_SERIAL_CONSOLE
bool
depends on SERIAL_CONSOLE
default n
help
Use serial console during early (pre-RAM) boot stages
config CONSOLE_SERIAL8250
bool "Serial port console output (I/O mapped, 8250-compatible)"
depends on SERIAL_CONSOLE