src/include: Wrap lines at 80 columns

Fix the following warning detected by checkpatch.pl:

WARNING: line over 80 characters

Changed a few comments to reduce line length.  File
src/include/cpu/amd/vr.h was skipped.

TEST=Build and run on Galileo Gen2

Change-Id: Ie3c07111acc1f89923fb31135684a6d28a505b61
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18687
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Lee Leahy
2017-03-07 17:45:12 -08:00
parent d0f26fcea2
commit 6a566d7fbe
37 changed files with 468 additions and 249 deletions

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@@ -48,7 +48,8 @@ void __attribute__ ((noreturn)) die(const char *msg);
#if __CONSOLE_ENABLE__
asmlinkage void console_init(void);
int console_log_level(int msg_level);
int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
int do_printk(int msg_level, const char *fmt, ...)
__attribute__((format(printf, 2, 3)));
void do_putchar(unsigned char byte);
#define printk(LEVEL, fmt, args...) \

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@@ -25,7 +25,8 @@
/* While in romstage, console loglevel is built-time constant.
* With ROMCC we inline this test with help from preprocessor.
*/
#define console_log_level(msg_level) (msg_level <= CONFIG_DEFAULT_CONSOLE_LOGLEVEL)
#define console_log_level(msg_level) \
(msg_level <= CONFIG_DEFAULT_CONSOLE_LOGLEVEL)
#define CALL_CONSOLE_TX(loglevel, tx_func, x) \
do { \
@@ -35,11 +36,16 @@
} \
} while (0)
#define __console_tx_char(level, x) CALL_CONSOLE_TX(level, console_tx_byte, x)
#define __console_tx_hex8(level, x) CALL_CONSOLE_TX(level, console_tx_hex8, x)
#define __console_tx_hex16(level, x) CALL_CONSOLE_TX(level, console_tx_hex16, x)
#define __console_tx_hex32(level, x) CALL_CONSOLE_TX(level, console_tx_hex32, x)
#define __console_tx_string(level, x) CALL_CONSOLE_TX(level, console_tx_string, x)
#define __console_tx_char(level, x) \
CALL_CONSOLE_TX(level, console_tx_byte, x)
#define __console_tx_hex8(level, x) \
CALL_CONSOLE_TX(level, console_tx_hex8, x)
#define __console_tx_hex16(level, x) \
CALL_CONSOLE_TX(level, console_tx_hex16, x)
#define __console_tx_hex32(level, x) \
CALL_CONSOLE_TX(level, console_tx_hex32, x)
#define __console_tx_string(level, x) \
CALL_CONSOLE_TX(level, console_tx_string, x)
#define print_emerg(STR) __console_tx_string(BIOS_EMERG, STR)
#define print_alert(STR) __console_tx_string(BIOS_ALERT, STR)

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@@ -28,9 +28,18 @@ void ne2k_transmit(unsigned int eth_nic_base);
#endif
#if CONFIG_CONSOLE_NE2K && (ENV_ROMSTAGE || ENV_RAMSTAGE)
static inline void __ne2k_init(void) { ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT); }
static inline void __ne2k_tx_byte(u8 data) { ne2k_append_data_byte(data, CONFIG_CONSOLE_NE2K_IO_PORT); }
static inline void __ne2k_tx_flush(void) { ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT); }
static inline void __ne2k_init(void)
{
ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT);
}
static inline void __ne2k_tx_byte(u8 data)
{
ne2k_append_data_byte(data, CONFIG_CONSOLE_NE2K_IO_PORT);
}
static inline void __ne2k_tx_flush(void)
{
ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT);
}
#else
static inline void __ne2k_init(void) {}
static inline void __ne2k_tx_byte(u8 data) {}

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@@ -347,12 +347,13 @@
/*
* The following POST codes are taken from src/include/cpu/amd/geode_post_code.h
* They overlap with previous codes, and most are not even used
* Some mainboards still require them, but they are deprecated. We want to consolidate
* our own POST code structure with the codes above.
* Some mainboards still require them, but they are deprecated. We want to
* consolidate our own POST code structure with the codes above.
*
* standard AMD post definitions for the AMD Geode
*/
#define POST_Output_Port (0x080) /* port to write post codes to*/
/* port to write post codes to */
#define POST_Output_Port (0x080)
#define POST_preSioInit (0x000)
#define POST_clockInit (0x001)

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@@ -9,7 +9,10 @@ void qemu_debugcon_tx_byte(unsigned char data);
#if CONFIG_CONSOLE_QEMU_DEBUGCON && (ENV_ROMSTAGE || ENV_RAMSTAGE)
static inline void __qemu_debugcon_init(void) { qemu_debugcon_init(); }
static inline void __qemu_debugcon_tx_byte(u8 data) { qemu_debugcon_tx_byte(data); }
static inline void __qemu_debugcon_tx_byte(u8 data)
{
qemu_debugcon_tx_byte(data);
}
#else
static inline void __qemu_debugcon_init(void) {}
static inline void __qemu_debugcon_tx_byte(u8 data) {}

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@@ -27,7 +27,10 @@ void spiconsole_tx_byte(unsigned char c);
#if __CONSOLE_SPI_ENABLE__
static inline void __spiconsole_init(void) { spiconsole_init(); }
static inline void __spiconsole_tx_byte(u8 data) { spiconsole_tx_byte(data); }
static inline void __spiconsole_tx_byte(u8 data)
{
spiconsole_tx_byte(data);
}
#else
static inline void __spiconsole_init(void) {}
static inline void __spiconsole_tx_byte(u8 data) {}

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@@ -60,9 +60,18 @@ void oxford_remap(unsigned int new_base);
ENV_POSTCAR || (ENV_SMM && CONFIG_DEBUG_SMI)))
#if __CONSOLE_SERIAL_ENABLE__
static inline void __uart_init(void) { uart_init(CONFIG_UART_FOR_CONSOLE); }
static inline void __uart_tx_byte(u8 data) { uart_tx_byte(CONFIG_UART_FOR_CONSOLE, data); }
static inline void __uart_tx_flush(void) { uart_tx_flush(CONFIG_UART_FOR_CONSOLE); }
static inline void __uart_init(void)
{
uart_init(CONFIG_UART_FOR_CONSOLE);
}
static inline void __uart_tx_byte(u8 data)
{
uart_tx_byte(CONFIG_UART_FOR_CONSOLE, data);
}
static inline void __uart_tx_flush(void)
{
uart_tx_flush(CONFIG_UART_FOR_CONSOLE);
}
#else
static inline void __uart_init(void) {}
static inline void __uart_tx_byte(u8 data) {}
@@ -72,9 +81,15 @@ static inline void __uart_tx_flush(void) {}
#if CONFIG_GDB_STUB && (ENV_ROMSTAGE || ENV_RAMSTAGE)
#define CONFIG_UART_FOR_GDB CONFIG_UART_FOR_CONSOLE
static inline void __gdb_hw_init(void) { uart_init(CONFIG_UART_FOR_GDB); }
static inline void __gdb_tx_byte(u8 data) { uart_tx_byte(CONFIG_UART_FOR_GDB, data); }
static inline void __gdb_tx_byte(u8 data)
{
uart_tx_byte(CONFIG_UART_FOR_GDB, data);
}
static inline void __gdb_tx_flush(void) { uart_tx_flush(CONFIG_UART_FOR_GDB); }
static inline u8 __gdb_rx_byte(void) { return uart_rx_byte(CONFIG_UART_FOR_GDB); }
static inline u8 __gdb_rx_byte(void)
{
return uart_rx_byte(CONFIG_UART_FOR_GDB);
}
#endif
#endif /* __ROMCC__ */

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@@ -35,7 +35,10 @@ int usb_can_rx_byte(int idx);
#if __CONSOLE_USB_ENABLE__
static inline void __usbdebug_init(void) { usbdebug_init(); }
static inline void __usb_tx_byte(u8 data) { usb_tx_byte(USB_PIPE_FOR_CONSOLE, data); }
static inline void __usb_tx_byte(u8 data)
{
usb_tx_byte(USB_PIPE_FOR_CONSOLE, data);
}
static inline void __usb_tx_flush(void) { usb_tx_flush(USB_PIPE_FOR_CONSOLE); }
#else
static inline void __usbdebug_init(void) {}
@@ -47,9 +50,15 @@ static inline void __usb_tx_flush(void) {}
#if 0 && CONFIG_GDB_STUB && \
((ENV_ROMSTAGE && CONFIG_USBDEBUG_IN_ROMSTAGE) || ENV_RAMSTAGE)
static inline void __gdb_hw_init(void) { usbdebug_init(); }
static inline void __gdb_tx_byte(u8 data) { usb_tx_byte(USB_PIPE_FOR_GDB, data); }
static inline void __gdb_tx_byte(u8 data)
{
usb_tx_byte(USB_PIPE_FOR_GDB, data);
}
static inline void __gdb_tx_flush(void) { usb_tx_flush(USB_PIPE_FOR_GDB); }
static inline u8 __gdb_rx_byte(void) { return usb_rx_byte(USB_PIPE_FOR_GDB); }
static inline u8 __gdb_rx_byte(void)
{
return usb_rx_byte(USB_PIPE_FOR_GDB);
}
#endif
#endif /* _CONSOLE_USB_H_ */