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soc/intel/skylake: Add SKL SOC PCH H GPIO support

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Add SKL/KBL PCH-H GPIO settings referring from SKL PCH-H
specifications to support sklrvp11.

Split the gpio_defs.h into headers gpio_pch_h_defs.h and
gpio_soc_defs.h for PCH-H specific and SOC specific GPIO
defs respectively.

Change-Id: I5eaf8d809a1244a56038cbfc29502910eb90f9f2
Signed-off-by: Li Cheng Sooi <li.cheng.sooi@intel.com>
Signed-off-by: Rahul Kumar Gupta <rahul.kumarxx.gupta@intel.com>
Reviewed-on: https://review.coreboot.org/18027
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Li Cheng Sooi
2017-01-04 09:48:39 +08:00
committed by Aaron Durbin
parent 86ee4db0d8
commit 6a740539d1
5 changed files with 510 additions and 194 deletions
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21
src/soc/intel/skylake/acpi/gpio.asl
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@@ -75,6 +75,26 @@ Device (GPIO)
*/
Method (GADD, 1, NotSerialized)
{
#if IS_ENABLED(CONFIG_SKYLAKE_SOC_PCH_H)
/* GPIO Community 0 */
If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, GPP_B23)))
{
Store (PID_GPIOCOM0, Local0)
Subtract (Arg0, GPP_A0, Local1)
}
/* GPIO Community 1 */
If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, GPP_H23)))
{
Store (PID_GPIOCOM1, Local0)
Subtract (Arg0, GPP_C0, Local1)
}
/* GPIO Community 03 */
If (LAnd (LGreaterEqual (Arg0, GPP_I0), LLessEqual (Arg0, GPP_I10)))
{
Store (PID_GPIOCOM3, Local0)
Subtract (Arg0, GPP_I0, Local1)
}
#else
/* GPIO Community 0 */
If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, GPP_B23)))
{
@@ -93,6 +113,7 @@ Method (GADD, 1, NotSerialized)
Store (PID_GPIOCOM3, Local0)
Subtract (Arg0, GPP_F0, Local1)
}
#endif /* CONFIG_SKYLAKE_SOC_PCH_H */
Store (PCRB (Local0), Local2)
Add (Local2, PAD_CFG_DW_OFFSET, Local2)
Return (Add (Local2, Multiply (Local1, 8)))