cpu/intel/car: Prepare for some POSTCAR_STAGE support

The file cache_as_ram_ht.inc is used across a variety
of CPUs and northbridges. We need to split it anyway
for future C_ENVIRONMENT_BOOTBLOCK and verstage work.

Split and rename the files, remove code that is globally
implemented in POSTCAR_STAGE framework already.

Change-Id: I2ba67772328fce3d5d1ae34c36aea8dcdcc56b87
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26747
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2018-05-17 17:22:51 +03:00
parent 8168046432
commit 6a8ce0d250
8 changed files with 449 additions and 5 deletions

View File

@@ -22,6 +22,8 @@ void mainboard_romstage_entry(unsigned long bist);
*/
void *setup_stack_and_mtrrs(void);
void platform_enter_postcar(void);
/* romstage_main is called from the cache-as-ram assembly file to prepare
* CAR stack guards.*/
asmlinkage void *romstage_main(unsigned long bist);