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drivers/intel/fsp1_1: Drop empty weak functions

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The only FSP 1.1 platform is Braswell. Drop unnecessary functions which
only have a weak stub definition.

Change-Id: Ie60213e5a6ae67bd8b982ee505f4b512253577c6
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54957
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Angel Pons
2021-05-26 15:10:08 +02:00
committed by Felix Held
parent 2a29d45350
commit 6a936fc6ae
4 changed files with 0 additions and 31 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/drivers/intel/fsp1_1/include/fsp/ramstage.h
View File

@@ -8,8 +8,6 @@
/* Perform Intel silicon init. */
void intel_silicon_init(void);
/* Called after the silicon init code has run. */
void soc_after_silicon_init(void);
/* Initialize UPD data before SiliconInit call. */
void soc_silicon_init_params(SILICON_INIT_UPD *params);
void mainboard_silicon_init_params(SILICON_INIT_UPD *params);

4
src/drivers/intel/fsp1_1/include/fsp/romstage.h
View File

@@ -29,9 +29,6 @@ void mainboard_memory_init_params(struct romstage_params *params,
MEMORY_INIT_UPD *memory_params);
void mainboard_pre_raminit(struct romstage_params *params);
void mainboard_save_dimm_info(struct romstage_params *params);
void mainboard_add_dimm_info(struct romstage_params *params,
struct memory_info *mem_info,
int channel, int dimm, int index);
void raminit(struct romstage_params *params);
/* Initialize memory margin analysis settings. */
void setup_mma(MEMORY_INIT_UPD *memory_upd);
@@ -40,7 +37,6 @@ void soc_display_memory_init_params(const MEMORY_INIT_UPD *old,
MEMORY_INIT_UPD *new);
void soc_memory_init_params(struct romstage_params *params,
MEMORY_INIT_UPD *upd);
void soc_pre_ram_init(struct romstage_params *params);
void mainboard_after_memory_init(void);
#endif /* _COMMON_ROMSTAGE_H_ */

6
src/drivers/intel/fsp1_1/ramstage.c
View File

@@ -13,11 +13,6 @@
#include <timestamp.h>
#include <cbmem.h>
/* SOC initialization after FSP silicon init */
__weak void soc_after_silicon_init(void)
{
}
static void display_hob_info(FSP_INFO_HEADER *fsp_info_header)
{
const EFI_GUID graphics_info_guid = EFI_PEI_GRAPHICS_INFO_HOB_GUID;
@@ -141,7 +136,6 @@ static void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header)
}
display_hob_info(fsp_info_header);
soc_after_silicon_init();
}
static void fsp_load(void)

19
src/drivers/intel/fsp1_1/romstage.c
View File

@@ -33,8 +33,6 @@ static void raminit_common(struct romstage_params *params)
elog_boot_notify(s3wake);
/* Perform remaining SOC initialization */
soc_pre_ram_init(params);
post_code(0x33);
/* Check recovery and MRC cache */
@@ -258,10 +256,6 @@ __weak void mainboard_save_dimm_info(
MEMORY_BUS_WIDTH_128;
break;
}
/* Add any mainboard specific information */
mainboard_add_dimm_info(params, mem_info,
channel, dimm, index);
index++;
}
}
@@ -269,16 +263,3 @@ __weak void mainboard_save_dimm_info(
mem_info->dimm_cnt = index;
printk(BIOS_DEBUG, "%d DIMMs found\n", mem_info->dimm_cnt);
}
/* Add any mainboard specific information */
__weak void mainboard_add_dimm_info(
struct romstage_params *params,
struct memory_info *mem_info,
int channel, int dimm, int index)
{
}
/* SOC initialization before RAM is enabled */
__weak void soc_pre_ram_init(struct romstage_params *params)
{
}