baytrail: Add BCLK and IACORE to pattrs

The bus clock speed is needed when building ACPI P-state tables
so extract that function and have the value be saved in pattrs.

The various IACORE values are also needed, but rather than have
the ACPI code to the bit manipulation have the pattrs store an
array of the possible values for it to use directly.

BUG=chrome-os-partner:23505
BRANCH=none
TEST=build and boot on rambi

Change-Id: I5ac06ccf66e9109186dd01342dbb6ccdd334ca69
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176140
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4953
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

src/soc/intel/baytrail/tsc_freq.c

@@ -22,28 +22,32 @@
 #include <cpu/x86/tsc.h>
 #include <baytrail/msr.h>
 
+unsigned bus_freq_khz(void)
+{
+	msr_t clk_info = rdmsr(MSR_BSEL_CR_OVERCLOCK_CONTROL);
+	switch (clk_info.lo & 0x3) {
+	case 0:
+		return 83333;
+	case 1:
+		return 100000;
+	case 2:
+		return 133333;
+	case 3:
+		return 116666;
+	default:
+		return 0;
+	}
+}
+
 unsigned long tsc_freq_mhz(void)
 {
 	msr_t platform_info;
-	msr_t clk_info;
-	unsigned long bclk_khz;
+	unsigned bclk_khz = bus_freq_khz();
+
+	if (!bclk_khz)
+		return 0;
 
 	platform_info = rdmsr(MSR_PLATFORM_INFO);
-	clk_info = rdmsr(MSR_BSEL_CR_OVERCLOCK_CONTROL);
-	switch (clk_info.lo & 0x3) {
-	case 0:
-		bclk_khz =  83333;
-		break;
-	case 1:
-		bclk_khz = 100000;
-		break;
-	case 2:
-		bclk_khz = 133333;
-		break;
-	case 3:
-		bclk_khz = 116666;
-		break;
-	}
 	return (bclk_khz * ((platform_info.lo >> 8) & 0xff)) / 1000;
 }