From 6ab4a7243cf69a5b9e33fb4b1e241476328c80c2 Mon Sep 17 00:00:00 2001 From: Tim Crawford Date: Tue, 27 Feb 2024 09:20:40 -0700 Subject: [PATCH] mb/system76/adl,rpl: Fix HDA codec init Commit 2d482386182e ("soc/intel/alderlake: Set PchHdaSdiEnable for Alder Lake") hooked up a new UPD, overriding the FSP default and causing HDA init to break. Hook up the new UPD in the devicetree to restore HDA functionality. Also remove PchHdaAudioLinkHdaEnable per board romstage, as it set in the devicetree. Change-Id: I2533fa829fac4913308379788911339effa36d9f Signed-off-by: Tim Crawford --- src/mainboard/system76/adl/devicetree.cb | 1 + src/mainboard/system76/adl/variants/lemp11/romstage.c | 1 - src/mainboard/system76/adl/variants/oryp10/romstage.c | 1 - src/mainboard/system76/adl/variants/oryp9/romstage.c | 1 - src/mainboard/system76/rpl/devicetree.cb | 1 + 5 files changed, 2 insertions(+), 3 deletions(-) diff --git a/src/mainboard/system76/adl/devicetree.cb b/src/mainboard/system76/adl/devicetree.cb index ad70b0595b..a424497c22 100644 --- a/src/mainboard/system76/adl/devicetree.cb +++ b/src/mainboard/system76/adl/devicetree.cb @@ -81,6 +81,7 @@ chip soc/intel/alderlake end device ref p2sb on end device ref hda on + register "pch_hda_sdi_enable[0]" = "1" register "pch_hda_audio_link_hda_enable" = "1" register "pch_hda_idisp_codec_enable" = "1" register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" diff --git a/src/mainboard/system76/adl/variants/lemp11/romstage.c b/src/mainboard/system76/adl/variants/lemp11/romstage.c index 989b5dff8f..211ab97d20 100644 --- a/src/mainboard/system76/adl/variants/lemp11/romstage.c +++ b/src/mainboard/system76/adl/variants/lemp11/romstage.c @@ -15,7 +15,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }; const bool half_populated = false; - mupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1; mupd->FspmConfig.DmiMaxLinkSpeed = 4; mupd->FspmConfig.GpioOverride = 0; diff --git a/src/mainboard/system76/adl/variants/oryp10/romstage.c b/src/mainboard/system76/adl/variants/oryp10/romstage.c index 082d0cbd10..dfd826a759 100644 --- a/src/mainboard/system76/adl/variants/oryp10/romstage.c +++ b/src/mainboard/system76/adl/variants/oryp10/romstage.c @@ -33,7 +33,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) // Set primary display to internal graphics mupd->FspmConfig.PrimaryDisplay = 0; - mupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1; mupd->FspmConfig.DmiMaxLinkSpeed = 4; mupd->FspmConfig.GpioOverride = 0; diff --git a/src/mainboard/system76/adl/variants/oryp9/romstage.c b/src/mainboard/system76/adl/variants/oryp9/romstage.c index 201fc75f37..cea4ff5155 100644 --- a/src/mainboard/system76/adl/variants/oryp9/romstage.c +++ b/src/mainboard/system76/adl/variants/oryp9/romstage.c @@ -30,7 +30,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) // Set primary display to internal graphics mupd->FspmConfig.PrimaryDisplay = 0; - mupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1; mupd->FspmConfig.DmiMaxLinkSpeed = 4; mupd->FspmConfig.GpioOverride = 0; diff --git a/src/mainboard/system76/rpl/devicetree.cb b/src/mainboard/system76/rpl/devicetree.cb index a016dec962..56c1f0751a 100644 --- a/src/mainboard/system76/rpl/devicetree.cb +++ b/src/mainboard/system76/rpl/devicetree.cb @@ -65,6 +65,7 @@ chip soc/intel/alderlake end device ref p2sb on end device ref hda on + register "pch_hda_sdi_enable[0]" = "1" register "pch_hda_audio_link_hda_enable" = "1" register "pch_hda_idisp_codec_enable" = "1" register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"