The UART divider should be calculated based on the base frequency

and baudrate, not hardcoded in addition to that.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2011-04-22 01:45:11 +00:00
committed by Stefan Reinauer
parent 3e4fb9d1a1
commit 6aca1e8b26
4 changed files with 16 additions and 10 deletions

View File

@@ -37,9 +37,7 @@ config IRQ_SLOT_COUNT
int
default 10
# WTF, is this 19200?
config TTYS0_DIV
int
default 6
# This mainboard might have a higher clocked UART or might not be able to run
# serial output at 115200 baud
endif