The UART divider should be calculated based on the base frequency
and baudrate, not hardcoded in addition to that. Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Stefan Reinauer
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6aca1e8b26
@@ -37,9 +37,7 @@ config IRQ_SLOT_COUNT
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int
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default 10
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# WTF, is this 19200?
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config TTYS0_DIV
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int
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default 6
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# This mainboard might have a higher clocked UART or might not be able to run
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# serial output at 115200 baud
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endif
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