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soc/amd/picasso: clean up Kconfig and header

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Clean up Kconfig and psp_trasfer.h files before copying over to cezanne.

TEST=build, flash and boot on jelboz360

Signed-off-by: Kangheui Won <khwon@chromium.org>
Change-Id: Ib370d93e23c15a2fe4c46051ed3647d2d067bb10
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52563
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kangheui Won
2021-04-21 14:48:14 +10:00
committed by Felix Held
parent 62047e582b
commit 6b36c83626
2 changed files with 4 additions and 14 deletions
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14
src/soc/amd/picasso/Kconfig
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@@ -109,9 +109,9 @@ config PSP_SHAREDMEM_BASE
default 0x0 default 0x0
help help
This variable defines the base address in DRAM memory where PSP copies This variable defines the base address in DRAM memory where PSP copies
vboot workbuf to. This is used in linker script to have a static the vboot workbuf. This is used in the linker script to have a static
allocation for the buffer as well as for adding relevant entries in allocation for the buffer as well as for adding relevant entries in
BIOS directory table for the PSP. the BIOS directory table for the PSP.
config PSP_SHAREDMEM_SIZE config PSP_SHAREDMEM_SIZE
hex hex
@@ -405,16 +405,6 @@ config PSP_WHITELIST_FILE
depends on HAVE_PSP_WHITELIST_FILE depends on HAVE_PSP_WHITELIST_FILE
default "3rdparty/amd_blobs/picasso/PSP/wtl-rvn.sbin" default "3rdparty/amd_blobs/picasso/PSP/wtl-rvn.sbin"
config PSP_SHAREDMEM_SIZE
hex "Maximum size of shared memory area"
default 0x3000 if VBOOT
default 0x0
help
Sets the maximum size for the PSP to pass the vboot workbuf and
any logs or timestamps back to coreboot. This will be copied
into main memory by the PSP and will be available when the x86 is
started.
config PSP_UNLOCK_SECURE_DEBUG config PSP_UNLOCK_SECURE_DEBUG
bool "Unlock secure debug" bool "Unlock secure debug"
default n default n

4
src/soc/amd/picasso/include/soc/psp_transfer.h
View File

@@ -9,7 +9,7 @@
# error "Must set CONFIG_CMOS_RECOVERY_BYTE" # error "Must set CONFIG_CMOS_RECOVERY_BYTE"
# endif # endif
#define CMOS_RECOVERY_MAGIC_VAL 0x96 #define CMOS_RECOVERY_MAGIC_VAL 0x96
#define TRANSFER_INFO_SIZE 64 #define TRANSFER_INFO_SIZE 64
#define TIMESTAMP_BUFFER_SIZE 0x200 #define TIMESTAMP_BUFFER_SIZE 0x200
@@ -44,7 +44,7 @@ struct transfer_info_struct {
uint32_t psp_info; /* Offset 0x3C */ uint32_t psp_info; /* Offset 0x3C */
}; };
_Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE, \ _Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE,
"TRANSFER_INFO_SIZE is incorrect"); "TRANSFER_INFO_SIZE is incorrect");
/* Make sure the PSP transferred information over to x86 side. */ /* Make sure the PSP transferred information over to x86 side. */