treewide: Remove "this file is part of" lines

Stefan thinks they don't add value.

Command used:
sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool)

The exceptions are for:
 - crossgcc (patch file)
 - gcov (imported from gcc)
 - elf.h (imported from GNU's libc)
 - nvramtool (more complicated header)

The removed lines are:
-       fmt.Fprintln(f, "/* This file is part of the coreboot project. */")
-# This file is part of a set of unofficial pre-commit hooks available
-/* This file is part of coreboot */
-# This file is part of msrtool.
-/* This file is part of msrtool. */
- * This file is part of ncurses, designed to be appended after curses.h.in
-/* This file is part of pgtblgen. */
- * This file is part of the coreboot project.
- /* This file is part of the coreboot project. */
-#  This file is part of the coreboot project.
-# This file is part of the coreboot project.
-## This file is part of the coreboot project.
--- This file is part of the coreboot project.
-/* This file is part of the coreboot project */
-/* This file is part of the coreboot project. */
-;## This file is part of the coreboot project.
-# This file is part of the coreboot project. It originated in the
- * This file is part of the coreinfo project.
-## This file is part of the coreinfo project.
- * This file is part of the depthcharge project.
-/* This file is part of the depthcharge project. */
-/* This file is part of the ectool project. */
- * This file is part of the GNU C Library.
- * This file is part of the libpayload project.
-## This file is part of the libpayload project.
-/* This file is part of the Linux kernel. */
-## This file is part of the superiotool project.
-/* This file is part of the superiotool project */
-/* This file is part of uio_usbdebug */

Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/southbridge/amd/agesa/Kconfig

@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 source "src/southbridge/amd/agesa/hudson/Kconfig"

src/southbridge/amd/agesa/Makefile.inc

@@ -1,5 +1,4 @@
 #
-# This file is part of the coreboot project.
 #
 #
 # SPDX-License-Identifier: GPL-2.0-only

src/southbridge/amd/agesa/hudson/Kconfig

@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 config SOUTHBRIDGE_AMD_AGESA_HUDSON

src/southbridge/amd/agesa/hudson/acpi/AmdImc.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 OperationRegion(IMIO, SystemIO, 0x3E, 0x02)
 Field(IMIO , ByteAcc, NoLock, Preserve) {

src/southbridge/amd/agesa/hudson/acpi/audio.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Device(AZHD) {	/* 0:14.2 - HD Audio */
 	Name(_ADR, 0x00140002)

src/southbridge/amd/agesa/hudson/acpi/fch.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /* System Bus */
 /*  _SB.PCI0 */

src/southbridge/amd/agesa/hudson/acpi/lpc.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /* 0:14.3 - LPC */
 Device(LIBR) {

src/southbridge/amd/agesa/hudson/acpi/pci_int.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 	/* PCIe Configuration Space for CONFIG_MMCONF_BUS_NUMBER busses */
 	OperationRegion(PCFG, SystemMemory, PCBA, PCLN) /* Each bus consumes 1MB */

src/southbridge/amd/agesa/hudson/acpi/pcie.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 	/* PCI IRQ mapping registers, C00h-C01h. */
 	OperationRegion(PRQM, SystemIO, 0x00000C00, 0x00000002)

src/southbridge/amd/agesa/hudson/acpi/usb.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /* 0:12.0 - OHCI */
 Device(UOH1) {

src/southbridge/amd/agesa/hudson/amd_pci_int_defs.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef AMD_PCI_INT_DEFS_H
 #define AMD_PCI_INT_DEFS_H

src/southbridge/amd/agesa/hudson/amd_pci_int_types.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef AMD_PCI_INT_TYPES_H
 #define AMD_PCI_INT_TYPES_H

src/southbridge/amd/agesa/hudson/bootblock.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <arch/bootblock.h>

src/southbridge/amd/agesa/hudson/chip.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef HUDSON_CHIP_H
 #define HUDSON_CHIP_H

src/southbridge/amd/agesa/hudson/early_setup.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _HUDSON_EARLY_SETUP_C_
 #define _HUDSON_EARLY_SETUP_C_

src/southbridge/amd/agesa/hudson/enable_usbdebug.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__

src/southbridge/amd/agesa/hudson/fadt.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /*
  * ACPI - create the Fixed ACPI Description Tables (FADT)

src/southbridge/amd/agesa/hudson/hda.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/device.h>
 #include <device/pci.h>

src/southbridge/amd/agesa/hudson/hudson.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <amdblocks/acpimmio.h>
 #include <console/console.h>

src/southbridge/amd/agesa/hudson/hudson.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef HUDSON_H
 #define HUDSON_H

src/southbridge/amd/agesa/hudson/ide.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/device.h>
 #include <device/pci.h>

src/southbridge/amd/agesa/hudson/imc.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include "imc.h"
 #include <amdblocks/acpimmio.h>

src/southbridge/amd/agesa/hudson/imc.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef HUDSON_IMC_H
 #define HUDSON_IMC_H

src/southbridge/amd/agesa/hudson/lpc.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <amdblocks/acpimmio.h>
 #include <console/console.h>

src/southbridge/amd/agesa/hudson/pci.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/device.h>
 #include <device/pci.h>

src/southbridge/amd/agesa/hudson/pci_devs.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _AGESA_HUDSON_PCI_DEVS_H_
 #define _AGESA_HUDSON_PCI_DEVS_H_

src/southbridge/amd/agesa/hudson/pcie.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/device.h>
 #include <device/pci.h>

src/southbridge/amd/agesa/hudson/ramtop.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <arch/io.h>

src/southbridge/amd/agesa/hudson/reset.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__

src/southbridge/amd/agesa/hudson/resume.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <Proc/Fch/FchPlatform.h>
 #include <Proc/Fch/Fch.h>

src/southbridge/amd/agesa/hudson/sata.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/device.h>
 #include <device/pci.h>

src/southbridge/amd/agesa/hudson/sd.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/device.h>
 #include <device/pci.h>

src/southbridge/amd/agesa/hudson/sm.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/device.h>
 #include <device/pci.h>

src/southbridge/amd/agesa/hudson/smbus.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _HUDSON_SMBUS_C_
 #define _HUDSON_SMBUS_C_

src/southbridge/amd/agesa/hudson/smbus.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef HUDSON_SMBUS_H
 #define HUDSON_SMBUS_H

src/southbridge/amd/agesa/hudson/smbus_spd.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <amdblocks/acpimmio.h>
 #include <device/pci_def.h>

src/southbridge/amd/agesa/hudson/smi.c

@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 /*

src/southbridge/amd/agesa/hudson/smi.h

@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 /*

src/southbridge/amd/agesa/hudson/smi_util.c

@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 /*

src/southbridge/amd/agesa/hudson/smihandler.c

@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 /*

src/southbridge/amd/agesa/hudson/spi.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 #include <stdint.h>
 #include <device/mmio.h>
 #include <console/console.h>

src/southbridge/amd/agesa/hudson/usb.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/device.h>
 #include <device/pci.h>

src/southbridge/amd/cimx/Kconfig

@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 config AMD_SB_CIMX

src/southbridge/amd/cimx/Makefile.inc

@@ -1,5 +1,4 @@
 #
-# This file is part of the coreboot project.
 #
 #
 # SPDX-License-Identifier: GPL-2.0-only

src/southbridge/amd/cimx/sb800/Amd.h

@@ -9,7 +9,6 @@
  *
  */
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _AMD_H_
 #define _AMD_H_

src/southbridge/amd/cimx/sb800/AmdSbLib.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _AMD_SB_LIB_H_
 #define _AMD_SB_LIB_H_

src/southbridge/amd/cimx/sb800/Kconfig

@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 config SOUTHBRIDGE_AMD_CIMX_SB800

src/southbridge/amd/cimx/sb800/Makefile.inc

@@ -1,5 +1,4 @@
 #
-# This file is part of the coreboot project.
 #
 #
 # SPDX-License-Identifier: GPL-2.0-only

src/southbridge/amd/cimx/sb800/SBPLATFORM.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _AMD_SBPLATFORM_H_
 #define _AMD_SBPLATFORM_H_

src/southbridge/amd/cimx/sb800/acpi/audio.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Device(AZHD) {
 	Name(_ADR, 0x00140002)

src/southbridge/amd/cimx/sb800/acpi/fch.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /* System Bus */
 /*  _SB.PCI0 */

src/southbridge/amd/cimx/sb800/acpi/lpc.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Device(LIBR) {
 	Name(_ADR, 0x00140003)

src/southbridge/amd/cimx/sb800/acpi/pcie.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Scope(\) {
 	/* PCI IRQ mapping registers, C00h-C01h. */

src/southbridge/amd/cimx/sb800/acpi/smbus.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /* SMBUS Support */
 Mutex (SBX0, 0x00)

src/southbridge/amd/cimx/sb800/acpi/usb.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Device(UOH1) {
 	Name(_ADR, 0x00120000)

src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef AMD_PCI_INT_DEFS_H
 #define AMD_PCI_INT_DEFS_H

src/southbridge/amd/cimx/sb800/amd_pci_int_types.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef AMD_PCI_INT_TYPES_H
 #define AMD_PCI_INT_TYPES_H

src/southbridge/amd/cimx/sb800/bootblock.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <amdblocks/acpimmio.h>
 #include <arch/bootblock.h>

src/southbridge/amd/cimx/sb800/cfg.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include "SBPLATFORM.h"
 #include "cfg.h"

src/southbridge/amd/cimx/sb800/cfg.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 
 #ifndef _SB800_CFG_H_

src/southbridge/amd/cimx/sb800/chip.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _CIMX_SB800_CHIP_H_
 #define _CIMX_SB800_CHIP_H_

src/southbridge/amd/cimx/sb800/early.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <amdblocks/acpimmio.h>

src/southbridge/amd/cimx/sb800/fadt.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 
 /*

src/southbridge/amd/cimx/sb800/fan.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <amdblocks/acpimmio.h>
 #include <device/device.h>

src/southbridge/amd/cimx/sb800/fan.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _SB800_FAN_H_
 #define _SB800_FAN_H_

src/southbridge/amd/cimx/sb800/gpio_oem.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _CIMX_SB_GPIO_OEM_H_
 #define _CIMX_SB_GPIO_OEM_H_

src/southbridge/amd/cimx/sb800/late.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <amdblocks/acpimmio.h>
 #include <device/mmio.h>

src/southbridge/amd/cimx/sb800/lpc.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <device/pci.h>

src/southbridge/amd/cimx/sb800/lpc.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _SB800_LPC_H_
 #define _SB800_LPC_H_

src/southbridge/amd/cimx/sb800/pci_devs.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _CIMX_SB800_PCI_DEVS_H_
 #define _CIMX_SB800_PCI_DEVS_H_

src/southbridge/amd/cimx/sb800/ramtop.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <arch/io.h>

src/southbridge/amd/cimx/sb800/reset.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__

src/southbridge/amd/cimx/sb800/sb_cimx.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 
 #ifndef _CIMX_H_

src/southbridge/amd/cimx/sb800/smbus.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 
 #include <arch/io.h>

src/southbridge/amd/cimx/sb800/smbus.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _SB800_SMBUS_H_
 #define _SB800_SMBUS_H_

src/southbridge/amd/cimx/sb800/smbus_spd.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/pci_def.h>
 #include <device/device.h>

src/southbridge/amd/cimx/sb800/smbus_spd.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _SMBUS_SPD_H_
 #define _SMBUS_SPD_H_

src/southbridge/amd/cimx/sb800/spi.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <device/mmio.h>
 #include <console/console.h>

src/southbridge/amd/common/acpi/sleepstates.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
 #if CONFIG(HAVE_ACPI_RESUME)

src/southbridge/amd/common/amd_defs.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 
 #ifndef _AMD_SB_DEFS_H_

src/southbridge/amd/common/amd_pci_util.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <console/console.h>
 #include <device/pci.h>

src/southbridge/amd/common/amd_pci_util.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef AMD_PCI_UTIL_H
 #define AMD_PCI_UTIL_H

src/southbridge/amd/common/reset.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _AMD_SB_RESET_H_
 #define _AMD_SB_RESET_H_

src/southbridge/amd/pi/Kconfig

@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 source "src/southbridge/amd/pi/hudson/Kconfig"

src/southbridge/amd/pi/Makefile.inc

@@ -1,5 +1,4 @@
 #
-# This file is part of the coreboot project.
 #
 #
 # SPDX-License-Identifier: GPL-2.0-only

src/southbridge/amd/pi/hudson/Kconfig

@@ -1,4 +1,3 @@
-# This file is part of the coreboot project.
 # SPDX-License-Identifier: GPL-2.0-only
 
 config SOUTHBRIDGE_AMD_PI_BOLTON

src/southbridge/amd/pi/hudson/acpi/AmdImc.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 OperationRegion(IMIO, SystemIO, 0x3E, 0x02)
 Field(IMIO , ByteAcc, NoLock, Preserve) {

src/southbridge/amd/pi/hudson/acpi/audio.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 Device(AZHD) {	/* 0:14.2 - HD Audio */
 	Name(_ADR, 0x00140002)

src/southbridge/amd/pi/hudson/acpi/fch.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /* System Bus */
 /*  _SB.PCI0 */

src/southbridge/amd/pi/hudson/acpi/lpc.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /* 0:14.3 - LPC */
 Device(LIBR) {

src/southbridge/amd/pi/hudson/acpi/pci_int.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 	/* PCIe Configuration Space for CONFIG_MMCONF_BUS_NUMBER busses */
 	OperationRegion(PCFG, SystemMemory, PCBA, PCLN) /* Each bus consumes 1MB */

src/southbridge/amd/pi/hudson/acpi/pcie.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 	/* PCI IRQ mapping registers, C00h-C01h. */
 	OperationRegion(PRQM, SystemIO, 0x00000C00, 0x00000002)

src/southbridge/amd/pi/hudson/acpi/usb.asl

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /* 0:12.0 - OHCI */
 Device(UOH1) {

src/southbridge/amd/pi/hudson/amd_pci_int_defs.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef AMD_PCI_INT_DEFS_H
 #define AMD_PCI_INT_DEFS_H

src/southbridge/amd/pi/hudson/amd_pci_int_types.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef AMD_PCI_INT_TYPES_H
 #define AMD_PCI_INT_TYPES_H

src/southbridge/amd/pi/hudson/bootblock.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #include <stdint.h>
 #include <arch/bootblock.h>

src/southbridge/amd/pi/hudson/chip.h

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef HUDSON_CHIP_H
 #define HUDSON_CHIP_H

src/southbridge/amd/pi/hudson/early_setup.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 #ifndef _HUDSON_EARLY_SETUP_C_
 #define _HUDSON_EARLY_SETUP_C_

src/southbridge/amd/pi/hudson/enable_usbdebug.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__

src/southbridge/amd/pi/hudson/fadt.c

@@ -1,5 +1,4 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
 
 /*
  * ACPI - create the Fixed ACPI Description Tables (FADT)