sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Improving BKDG implementation of P-states,

Browse Source 
CPU and northbridge frequency and voltage
handling for Fam 10 in SVI mode.

I don't understand what this was doing nor find docs for these regs
Maybe it was left over from some copy & paste ?

Signed-off-by: Xavi Drudis Ferran <xdrudis@tinet.cat>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6410 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Xavi Drudis Ferran
2011-02-28 03:56:52 +00:00
committed by Marc Jones
parent 061c89e15d
commit 6bdc83bf5e
3 changed files with 3 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/cpu/amd/model_10xxx/fidvid.c
View File

@@ -738,7 +738,7 @@ static u32 init_fidvid_core(u32 nodeid, u32 coreid)
}
static void init_fidvid_ap(u32 bsp_apicid, u32 apicid, u32 nodeid, u32 coreid)
static void init_fidvid_ap(u32 apicid, u32 nodeid, u32 coreid)
{
u32 send;

5
src/cpu/amd/model_10xxx/init_cpus.c
View File

@@ -157,7 +157,7 @@ static inline int lapic_remote_read(int apicid, int reg, u32 *pvalue)
}
#if CONFIG_SET_FIDVID
static void init_fidvid_ap(u32 bsp_apicid, u32 apicid, u32 nodeid, u32 coreid);
static void init_fidvid_ap(u32 apicid, u32 nodeid, u32 coreid);
#endif
static inline __attribute__ ((always_inline))
@@ -346,8 +346,7 @@ static u32 init_cpus(u32 cpu_init_detectedx)
printk(BIOS_DEBUG,
"init_fidvid_ap(stage1) apicid: %02x\n",
apicid);
init_fidvid_ap(bsp_apicid, apicid, id.nodeid,
id.coreid);
init_fidvid_ap(apicid, id.nodeid, id.coreid);
}
}
#endif