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sb/intel/bd82x6x: Set up io_gen_dec in romstage based on devicetree

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Set up generic decode ranges based on the devicetree settings.

Change-Id: Ie59b8272c69231d6dffccee30b4d3c84a7e83e8f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Arthur Heymans
2019-06-16 23:29:23 +02:00
committed by Patrick Georgi
parent 4821a0e135
commit 6beaef983a
42 changed files with 38 additions and 128 deletions
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5
src/mainboard/intel/emeraldlake2/devicetree.cb
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@@ -44,8 +44,11 @@ chip northbridge/intel/sandybridge
register "sata_port_map" = "0x3f"
register "gen1_dec" = "0x00fc1601"
# runtime_port registers
register "gen2_dec" = "0x000c0181"
# SuperIO range is 0x700-0x73f
register "gen2_dec" = "0x003c0701"
register "gen3_dec" = "0x003c0701"
register "c2_latency" = "1"
register "p_cnt_throttling_supported" = "0"