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soc/intel/apollolake: Simplify is-device-enabled checks

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Simplify if-statements and use is_dev_enabled() where possible.

Change-Id: Ieeec987dc2bfe5bdef31882edbbb36e52f63b0e6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43899
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Singer
2020-07-26 09:26:52 +02:00
committed by Michael Niewöhner
parent ca4164e629
commit 6c3a89c431
3 changed files with 7 additions and 8 deletions
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3
src/soc/intel/apollolake/acpi.c
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@ -4,6 +4,7 @@
#include <acpi/acpi_gnvs.h> #include <acpi/acpi_gnvs.h>
#include <acpi/acpigen.h> #include <acpi/acpigen.h>
#include <console/console.h> #include <console/console.h>
#include <device/device.h>
#include <device/mmio.h> #include <device/mmio.h>
#include <arch/smp/mpspec.h> #include <arch/smp/mpspec.h>
#include <assert.h> #include <assert.h>
@ -170,7 +171,7 @@ static unsigned long soc_fill_dmar(unsigned long current)
unsigned long tmp; unsigned long tmp;
/* IGD has to be enabled, GFXVTBAR set and enabled. */ /* IGD has to be enabled, GFXVTBAR set and enabled. */
if (igfx_dev && igfx_dev->enabled && gfxvtbar && gfxvten) { if (is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten) {
tmp = current; tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar); current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);

7
src/soc/intel/apollolake/chip.c
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@ -554,7 +554,7 @@ static void glk_fsp_silicon_init_params_cb(
} }
dev = pcidev_path_on_root(SA_GLK_DEVFN_GMM); dev = pcidev_path_on_root(SA_GLK_DEVFN_GMM);
silconfig->Gmm = dev ? dev->enabled : 0; silconfig->Gmm = is_dev_enabled(dev);
/* On Geminilake, we need to override the default FSP PCIe de-emphasis /* On Geminilake, we need to override the default FSP PCIe de-emphasis
* settings using the device tree settings. This is because PCIe * settings using the device tree settings. This is because PCIe
@ -696,10 +696,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
silconfig->VtdEnable = cfg->enable_vtd; silconfig->VtdEnable = cfg->enable_vtd;
dev = pcidev_path_on_root(SA_DEVFN_IGD); dev = pcidev_path_on_root(SA_DEVFN_IGD);
if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled) silconfig->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_dev_enabled(dev);
silconfig->PeiGraphicsPeimInit = 1;
else
silconfig->PeiGraphicsPeimInit = 0;
mainboard_silicon_init_params(silconfig); mainboard_silicon_init_params(silconfig);
} }

5
src/soc/intel/apollolake/romstage.c
View File

@ -6,6 +6,7 @@
#include <assert.h> #include <assert.h>
#include <cf9_reset.h> #include <cf9_reset.h>
#include <console/console.h> #include <console/console.h>
#include <device/device.h>
#include <cpu/x86/pae.h> #include <cpu/x86/pae.h>
#include <delay.h> #include <delay.h>
#include <device/pci_def.h> #include <device/pci_def.h>
@ -258,9 +259,9 @@ static void parse_devicetree_setting(FSPM_UPD *m_upd)
DEVTREE_CONST struct device *dev = pcidev_path_on_root(PCH_DEVFN_NPK); DEVTREE_CONST struct device *dev = pcidev_path_on_root(PCH_DEVFN_NPK);
#if CONFIG(SOC_INTEL_GLK) #if CONFIG(SOC_INTEL_GLK)
m_upd->FspmConfig.TraceHubEn = dev ? dev->enabled : 0; m_upd->FspmConfig.TraceHubEn = is_dev_enabled(dev);
#else #else
m_upd->FspmConfig.NpkEn = dev ? dev->enabled : 0; m_upd->FspmConfig.NpkEn = is_dev_enabled(dev);
#endif #endif
} }