Documentation: Fix spelling errors

These issues were found and fixed by codespell, a useful tool for
finding spelling errors.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: If2a8e97911420c19e9365d5c28810b998f2c2ac8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58078
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Martin Roth
2021-10-01 14:10:19 -06:00
committed by Martin Roth
parent d4c55353e0
commit 6c3ece9c9e
34 changed files with 42 additions and 42 deletions

View File

@ -48,7 +48,7 @@
+---------------------+------------+
| Internal flashing | No |
+---------------------+------------+
| In curcuit flashing | Yes |
| In circuit flashing | Yes |
+---------------------+------------+
```
@ -67,8 +67,8 @@ The GPIO header is located on the **bottom** side (see [here][overview_bottom_li
The SPI header is located on the **bottom** side (see [here][overview_bottom_link]).
![][header_cn22]
### Preperations
In order to build coreboot, it's neccessary to extract some files from the vendor firmware. Make sure that you have a fully working dump.
### Preparations
In order to build coreboot, it's necessary to extract some files from the vendor firmware. Make sure that you have a fully working dump.
```bash
[upsquared]$ ls
firmware_vendor.rom