From 6ce1391d1c39a049dd4e834c6f4daaec2de9938d Mon Sep 17 00:00:00 2001
From: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Date: Tue, 4 Jul 2023 14:58:09 +0530
Subject: [PATCH] soc/intel/meteorlake: add power limits for 28W SKU

Add power limit values for Meteor Lake 28W SKU.

Reference: Intel MTL-UH_Power_Map_Rev1p2, doc: 640982

BRANCH=None
BUG=b:289854108
TEST=Build FW

Change-Id: I0b4741185278913d11d902d53345ae8ccebb18f8
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76239
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
---
 src/soc/intel/meteorlake/chipset.cb | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/soc/intel/meteorlake/chipset.cb b/src/soc/intel/meteorlake/chipset.cb
index b98e4f35b3..1f68eff5e7 100644
--- a/src/soc/intel/meteorlake/chipset.cb
+++ b/src/soc/intel/meteorlake/chipset.cb
@@ -8,6 +8,12 @@ chip soc/intel/meteorlake
 		.tdp_pl4 = 114,
 	}"
 
+	register "power_limits_config[MTL_P_682_CORE]" = "{
+		.tdp_pl1_override = 28,
+		.tdp_pl2_override = 64,
+		.tdp_pl4 = 120,
+	}"
+
 	# NOTE: if any variant wants to override this value, use the same format
 	# as register "common_soc_config.pch_thermal_trip" = "value", instead of
 	# putting it under register "common_soc_config" in overridetree.cb file.