mb/system76/tgl-u: Convert galp5 to a variant

Change-Id: I528fccbf25a58ed23306b9b70f37a2f08e27edbe
Signed-off-by: Tim Crawford <tcrawford@system76.com>

src/mainboard/system76/galp5/Kconfig

@@ -1,64 +0,0 @@
-if BOARD_SYSTEM76_GALP5
-
-config BOARD_SPECIFIC_OPTIONS
-	def_bool y
-	select BOARD_ROMSIZE_KB_16384
-	select DRIVERS_GFX_NVIDIA
-	select DRIVERS_I2C_HID
-	select DRIVERS_INTEL_PMC
-	select DRIVERS_INTEL_USB4_RETIMER
-	select EC_SYSTEM76_EC
-	select EC_SYSTEM76_EC_BAT_THRESHOLDS
-	select EC_SYSTEM76_EC_DGPU
-	select HAVE_ACPI_TABLES
-	select HAVE_CMOS_DEFAULT
-	select HAVE_OPTION_TABLE
-	select INTEL_GMA_HAVE_VBT
-	select INTEL_LPSS_UART_FOR_CONSOLE
-	select MEMORY_MAPPED_TPM
-	select MAINBOARD_HAS_TPM2
-	select NO_UART_ON_SUPERIO
-	select PCIEXP_HOTPLUG
-	select PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G
-	select SOC_INTEL_TIGERLAKE
-	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
-	select SPD_READ_BY_WORD
-	select SYSTEM_TYPE_LAPTOP
-	select TPM_MEASURED_BOOT
-	select TPM_RDRESP_NEED_DELAY
-
-config MAINBOARD_DIR
-	default "system76/galp5"
-
-config MAINBOARD_PART_NUMBER
-	default "galp5"
-
-config MAINBOARD_SMBIOS_PRODUCT_NAME
-	default "Galago Pro"
-
-config MAINBOARD_VERSION
-	default "galp5"
-
-config CBFS_SIZE
-	default 0xA00000
-
-config CONSOLE_POST
-	default y
-
-config ONBOARD_VGA_IS_PRIMARY
-	default y
-
-config POST_DEVICE
-	default n
-
-config UART_FOR_CONSOLE
-	default 2
-
-# PM Timer Disabled, saves power
-config USE_PM_ACPI_TIMER
-	default n
-
-config DRIVERS_GFX_NVIDIA_BRIDGE
-	default 0x1c
-
-endif

src/mainboard/system76/galp5/Kconfig.name

@@ -1,2 +0,0 @@
-config BOARD_SYSTEM76_GALP5
-	bool "galp5"

src/mainboard/system76/galp5/Makefile.inc

@@ -1,3 +0,0 @@
-bootblock-y += bootblock.c
-ramstage-y += ramstage.c
-ramstage-y += hda_verb.c

src/mainboard/system76/galp5/acpi/backlight.asl

@@ -1,31 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <drivers/intel/gma/acpi/gma.asl>
-
-Scope (GFX0)
-{
-	Name (BRIG, Package (22) {
-		40, /* default AC */
-		40, /* default Battery */
-		5,
-		10,
-		15,
-		20,
-		25,
-		30,
-		35,
-		40,
-		45,
-		50,
-		55,
-		60,
-		65,
-		70,
-		75,
-		80,
-		85,
-		90,
-		95,
-		100
-	})
-}

src/mainboard/system76/galp5/acpi/mainboard.asl

@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include "../gpio.h"
-
-#define EC_GPE_SCI 0x6E
-#define EC_GPE_SWI 0x6B
-#include <ec/system76/ec/acpi/ec.asl>
-
-Scope (\_SB) {
-	#include "sleep.asl"
-	Scope (PCI0) {
-		#include "backlight.asl"
-		Scope (RP01) { // Remapped from RP05
-			#include <drivers/gfx/nvidia/acpi/tigerlake.asl>
-		}
-	}
-}

src/mainboard/system76/galp5/acpi/sleep.asl

@@ -1,46 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <intelblocks/gpio.h>
-
-Method (PGPM, 1, Serialized)
-{
-	For (Local0 = 0, Local0 < 6, Local0++)
-	{
-		\_SB.PCI0.CGPM (Local0, Arg0)
-	}
-}
-
-/*
- * Method called from _PTS prior to system sleep state entry
- * Enables dynamic clock gating for all 5 GPIO communities
- */
-Method (MPTS, 1, Serialized)
-{
-	\_SB.PCI0.LPCB.EC0.PTS (Arg0)
-	PGPM (MISCCFG_GPIO_PM_CONFIG_BITS)
-}
-
-/*
- * Method called from _WAK prior to system sleep state wakeup
- * Disables dynamic clock gating for all 5 GPIO communities
- */
-Method (MWAK, 1, Serialized)
-{
-	PGPM (0)
-	\_SB.PCI0.LPCB.EC0.WAK (Arg0)
-}
-
-/*
- * S0ix Entry/Exit Notifications
- * Called from \_SB.PEPD._DSM
- */
-Method (MS0X, 1, Serialized)
-{
-	If (Arg0 == 1) {
-		/* S0ix Entry */
-		PGPM (MISCCFG_GPIO_PM_CONFIG_BITS)
-	} Else {
-		/* S0ix Exit */
-		PGPM (0)
-	}
-}

src/mainboard/system76/galp5/board_info.txt

@@ -1,8 +0,0 @@
-Vendor name: System76
-Board name: galp5
-Category: laptop
-Release year: 2020
-ROM package: SOIC-8
-ROM protocol: SPI
-ROM socketed: n
-Flashrom support: y

src/mainboard/system76/galp5/bootblock.c

@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <bootblock_common.h>
-#include <gpio.h>
-#include "gpio.h"
-
-void bootblock_mainboard_early_init(void)
-{
-	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
-}

src/mainboard/system76/galp5/cmos.default

@@ -1,3 +0,0 @@
-boot_option=Fallback
-debug_level=Debug
-me_state=Enable

src/mainboard/system76/galp5/cmos.layout

@@ -1,39 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-
-entries
-
-0	384	r	0	reserved_memory
-
-# RTC_BOOT_BYTE (coreboot hardcoded)
-384	1	e	4	boot_option
-388	4	h	0	reboot_counter
-
-# RTC_CLK_ALTCENTURY
-400	8	r	0	century
-
-412	4	e	6	debug_level
-416	1	e	2	me_state
-417	3	h	0	me_state_counter
-976	16	h	0	check_sum
-
-enumerations
-
-2	0	Enable
-2	1	Disable
-
-4	0	Fallback
-4	1	Normal
-
-6	0	Emergency
-6	1	Alert
-6	2	Critical
-6	3	Error
-6	4	Warning
-6	5	Notice
-6	6	Info
-6	7	Debug
-6	8	Spew
-
-checksums
-
-checksum 408 975 976

src/mainboard/system76/galp5/dsdt.asl

@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <acpi/acpi.h>
-DefinitionBlock(
-	"dsdt.aml",
-	"DSDT",
-	ACPI_DSDT_REV_2,
-	OEM_ID,
-	ACPI_TABLE_CREATOR,
-	0x20110725
-)
-{
-	#include <acpi/dsdt_top.asl>
-	#include <soc/intel/common/block/acpi/acpi/platform.asl>
-	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
-	#include <cpu/intel/common/acpi/cpu.asl>
-
-	Device (\_SB.PCI0)
-	{
-		#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
-		#include <soc/intel/tigerlake/acpi/southbridge.asl>
-		#include <soc/intel/tigerlake/acpi/tcss.asl>
-	}
-
-	#include <southbridge/intel/common/acpi/sleepstates.asl>
-
-	Scope (\_SB.PCI0.LPCB)
-	{
-		#include <drivers/pc80/pc/ps2_controller.asl>
-	}
-
-	#include "acpi/mainboard.asl"
-}

src/mainboard/system76/galp5/ramstage.c

@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <soc/ramstage.h>
-#include "gpio.h"
-
-void mainboard_silicon_init_params(FSP_S_CONFIG *params)
-{
-	params->CpuPcieRpAdvancedErrorReporting[0] = 0;
-
-	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
-}

src/mainboard/system76/tgl-u/Kconfig

@@ -1,14 +1,16 @@
-if BOARD_SYSTEM76_DARP7 || BOARD_SYSTEM76_LEMP10
+if BOARD_SYSTEM76_DARP7 || BOARD_SYSTEM76_GALP5 || BOARD_SYSTEM76_LEMP10
 
 config BOARD_SPECIFIC_OPTIONS
 	def_bool y
 	select BOARD_ROMSIZE_KB_16384
+	select DRIVERS_GFX_NVIDIA if BOARD_SYSTEM76_GALP5
 	select DRIVERS_I2C_HID
 	select DRIVERS_INTEL_PMC
 	select DRIVERS_INTEL_USB4_RETIMER
 	select EC_SYSTEM76_EC
 	select EC_SYSTEM76_EC_BAT_THRESHOLDS
 	select EC_SYSTEM76_EC_COLOR_KEYBOARD if BOARD_SYSTEM76_DARP7
+	select EC_SYSTEM76_EC_DGPU if BOARD_SYSTEM76_GALP5
 	select HAVE_ACPI_TABLES
 	select HAVE_CMOS_DEFAULT
 	select HAVE_OPTION_TABLE
@@ -32,6 +34,7 @@ config MAINBOARD_DIR
 
 config VARIANT_DIR
 	default "darp7" if BOARD_SYSTEM76_DARP7
+	default "galp5" if BOARD_SYSTEM76_GALP5
 	default "lemp10" if BOARD_SYSTEM76_LEMP10
 
 config OVERRIDE_DEVICETREE
@@ -39,14 +42,17 @@ config OVERRIDE_DEVICETREE
 
 config MAINBOARD_PART_NUMBER
 	default "darp7" if BOARD_SYSTEM76_DARP7
+	default "galp5" if BOARD_SYSTEM76_GALP5
 	default "lemp10" if BOARD_SYSTEM76_LEMP10
 
 config MAINBOARD_SMBIOS_PRODUCT_NAME
 	default "Darter Pro" if BOARD_SYSTEM76_DARP7
+	default "Galago Pro" if BOARD_SYSTEM76_GALP5
 	default "Lemur Pro" if BOARD_SYSTEM76_LEMP10
 
 config MAINBOARD_VERSION
 	default "darp7" if BOARD_SYSTEM76_DARP7
+	default "galp5" if BOARD_SYSTEM76_GALP5
 	default "lemp10" if BOARD_SYSTEM76_LEMP10
 
 config CBFS_SIZE
@@ -65,4 +71,15 @@ config UART_FOR_CONSOLE
 config USE_PM_ACPI_TIMER
 	default n
 
+# For galp5 with dGPU
+if DRIVERS_GFX_NVIDIA
+
+config ONBOARD_VGA_IS_PRIMARY
+	default y
+
+config DRIVERS_GFX_NVIDIA_BRIDGE
+	default 0x1c
+
+endif # DRIVERS_GFX_NVIDIA
+
 endif

src/mainboard/system76/tgl-u/Kconfig.name

@@ -1,5 +1,8 @@
 config BOARD_SYSTEM76_DARP7
 	bool "darp7"
 
+config BOARD_SYSTEM76_GALP5
+	bool "galp5"
+
 config BOARD_SYSTEM76_LEMP10
 	bool "lemp10"

src/mainboard/system76/tgl-u/Makefile.inc

@@ -1,4 +1,5 @@
 CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
 
 bootblock-y += bootblock.c
 bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c

src/mainboard/system76/tgl-u/acpi/mainboard.asl

@@ -1,5 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#if CONFIG(BOARD_SYSTEM76_GALP5)
+#include <variant/gpio.h>
+#endif
+
 #define EC_GPE_SCI 0x6E
 #define EC_GPE_SWI 0x6B
 #include <ec/system76/ec/acpi/ec.asl>
@@ -8,5 +12,10 @@ Scope (\_SB) {
 	#include "sleep.asl"
 	Scope (PCI0) {
 		#include "backlight.asl"
+#if CONFIG(BOARD_SYSTEM76_GALP5)
+		Scope (RP01) { // Remapped from RP05
+			#include <drivers/gfx/nvidia/acpi/tigerlake.asl>
+		}
+#endif
 	}
 }

src/mainboard/system76/tgl-u/variants/galp5/board_info.txt

@@ -0,0 +1,2 @@
+Board name: galp5
+Release year: 2020

src/mainboard/system76/tgl-u/variants/galp5/gpio.c

@@ -1,24 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#ifndef MAINBOARD_GPIO_H
+#include <mainboard/gpio.h>
-#define MAINBOARD_GPIO_H
-
 #include <soc/gpio.h>
 
-#define DGPU_RST_N	GPP_U4
-#define DGPU_PWR_EN	GPP_U5
-#define DGPU_GC6	GPP_D2
-#define DGPU_SSID	0x40181558
-
-#ifndef __ACPI__
-
-static const struct pad_config early_gpio_table[] = {
-	PAD_CFG_NF(GPP_C20, UP_20K, DEEP, NF1), // UART2_RXD
-	PAD_CFG_NF(GPP_C21, UP_20K, DEEP, NF1), // UART2_TXD
-	PAD_CFG_GPO(GPP_U4, 0, DEEP), // DGPU_RST#_PCH
-	PAD_CFG_GPO(GPP_U5, 0, DEEP), // DGPU_PWR_EN
-};
-
 static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1), // PM_BATLOW#
 	PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), // AC_PRESENT
@@ -229,6 +213,7 @@ static const struct pad_config gpio_table[] = {
 	//PAD_CFG_GPO(GPP_U5, 0, DEEP), // DGPU_PWR_EN
 };
 
-#endif /* __ACPI__ */
+void mainboard_configure_gpios(void)
-
+{
-#endif /* MAINBOARD_GPIO_H */
+	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
+}

src/mainboard/system76/tgl-u/variants/galp5/gpio_early.c

@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <mainboard/gpio.h>
+#include <soc/gpio.h>
+
+static const struct pad_config early_gpio_table[] = {
+	PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), // UART2_RXD
+	PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), // UART2_TXD
+	PAD_CFG_GPO(GPP_U4, 0, DEEP), // DGPU_RST#_PCH
+	PAD_CFG_GPO(GPP_U5, 0, DEEP), // DGPU_PWR_EN
+};
+
+void mainboard_configure_early_gpios(void)
+{
+	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}
+

src/mainboard/system76/tgl-u/variants/galp5/include/variant/gpio.h

@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef VARIANT_GPIO_H
+#define VARIANT_GPIO_H
+
+#include <soc/gpio.h>
+
+#define DGPU_RST_N	GPP_U4
+#define DGPU_PWR_EN	GPP_U5
+#define DGPU_GC6	GPP_D2
+#define DGPU_SSID	0x40181558
+
+#endif

src/mainboard/system76/tgl-u/variants/galp5/overridetree.cb

@@ -1,21 +1,4 @@
 chip soc/intel/tigerlake
-	register "common_soc_config" = "{
-		// Touchpad I2C bus
-		.i2c[0] = {
-			.speed = I2C_SPEED_FAST,
-			.rise_time_ns = 80,
-			.fall_time_ns = 110,
-		},
-	}"
-
-# ACPI (soc/intel/tigerlake/acpi.c)
-	# Enable Enhanced Intel SpeedStep
-	register "eist_enable" = "1"
-
-	# Enable s0ix, required for TGL-U
-	register "s0ix_enable" = "1"
-
-# CPU (soc/intel/tigerlake/cpu.c)
 	# Power limits
 	register "power_limits_config[POWER_LIMITS_U_4_CORE]" = "{
 		.tdp_pl1_override = 28,
@@ -26,86 +9,14 @@ chip soc/intel/tigerlake
 		.tdp_pl2_override = 51,
 	}"
 
-# FSP Memory (soc/intel/tigerlake/romstage/fsp_params.c)
-	# Enable C6 DRAM
-	register "enable_c6dram" = "1"
-
-	# System Agent dynamic frequency support
-	register "SaGv" = "SaGv_Enabled"
-
-# FSP Silicon (soc/intel/tigerlake/fsp_params.c)
-	# Acoustic settings
-	register "AcousticNoiseMitigation" = "1"
-	register "SlowSlewRate" = "SLEW_FAST_8"
-	register "FastPkgCRampDisable" = "1"
-
-	# FIVR configuration
-	#   Read EXT_RAIL_CONFIG to determine bitmaps
-	#     sudo devmem2 0xfe0011b8
-	#     0x0
-	#   Read EXT_V1P05_VR_CONFIG
-	#     sudo devmem2 0xfe0011c0
-	#     0x1a42000
-	#   Read EXT_VNN_VR_CONFIG0
-	#     sudo devmem2 0xfe0011c4
-	#     0x1a42000
-	# TODO: v1p05 voltage and vnn icc max?
-	register "ext_fivr_settings" = "{
-		.configure_ext_fivr = 1,
-		.v1p05_enable_bitmap = 0,
-		.vnn_enable_bitmap = 0,
-		.v1p05_supported_voltage_bitmap = 0,
-		.vnn_supported_voltage_bitmap = 0,
-		.v1p05_icc_max_ma = 500,
-		.vnn_sx_voltage_mv = 1050,
-	}"
-
-	# Read LPM_EN, make sure to invert the bits
-	register "LpmStateDisableMask" = "
-		LPM_S0i2_1 |
-		LPM_S0i2_2 |
-		LPM_S0i3_1 |
-		LPM_S0i3_2 |
-		LPM_S0i3_3 |
-		LPM_S0i3_4
-	"
-
-	# Thermal
-	register "tcc_offset" = "12"
-
-	# Enable CNVi BT
-	register "CnviBtCore" = "true"
-
-# PM Util (soc/intel/tigerlake/pmutil.c)
 	# GPE configuration
 	register "pmc_gpe0_dw0" = "PMC_GPP_A"
 	register "pmc_gpe0_dw1" = "PMC_GPP_R"
 	register "pmc_gpe0_dw2" = "PMC_GPD"
 
-# Actual device tree
-	device cpu_cluster 0 on
-		device lapic 0 on end
-	end
-
 	device domain 0 on
 		subsystemid 0x1558 0x4018 inherit
 
-		#From CPU EDS(575683)
-		device ref system_agent on end
-		device ref igpu on
-			# DDIA is eDP
-			register "DdiPortAConfig" = "1"
-			register "DdiPortAHpd" = "1"
-			register "DdiPortADdc" = "0"
-
-			# DDIB is HDMI
-			register "DdiPortBConfig" = "0"
-			register "DdiPortBHpd" = "1"
-			register "DdiPortBDdc" = "1"
-
-			register "gfx" = "GMA_DEFAULT_PANEL(0)"
-		end
-		device ref dptf on end
 		device ref peg on
 			# PCIe PEG0 x4, Clock 0 (SSD1)
 			register "PcieClkSrcUsage[0]" = "0x40"
@@ -117,8 +28,6 @@ chip soc/intel/tigerlake
 				device generic 0 on end
 			end
 		end
-		device ref tbt_pcie_rp0 on end # J_TYPEC2
-		device ref gna on end
 		device ref north_xhci on # J_TYPEC2
 			register "UsbTcPortEn" = "1"
 			register "TcssXhciEn" = "1"
@@ -141,7 +50,6 @@ chip soc/intel/tigerlake
 			end
 		end
 
-		# From PCH EDS(576591)
 		device ref south_xhci on
 			# USB2
 			register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # J_USB3_2
@@ -225,38 +133,10 @@ chip soc/intel/tigerlake
 				end
 			end
 		end
-		device ref shared_ram on end
-		device ref cnvi_wifi on
-			chip drivers/wifi/generic
-				register "wake" = "GPE0_PME_B0"
-				device generic 0 on end
-			end
-		end
-		device ref i2c0 on
-			# Touchpad I2C bus
-			register "SerialIoI2cMode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
-			chip drivers/i2c/hid
-				register "generic.hid" = ""PNP0C50""
-				register "generic.desc" = ""FocalTech Touchpad""
-				register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_B3)"
-				register "generic.probed" = "1"
-				register "hid_desc_reg_offset" = "0x01"
-				device i2c 38 on end
-			end
-		end
-		device ref i2c1 on
-			# TODO: USB-PD?
-			register "SerialIoI2cMode[PchSerialIoIndexI2C1]" = "PchSerialIoPci"
-		end
 		device ref i2c2 on
 			# TODO: Pantone ROM?
 			register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
 		end
-		device ref heci1 on end
-		device ref uart2 on
-			# Debug console
-			register "SerialIoUartMode[PchSerialIoIndexUART2]" = "PchSerialIoSkipInit"
-		end
 		device ref pcie_rp5 on
 			# PCIe root port #5 x4, Clock 2 (NVIDIA GPU)
 			register "PcieRpEnable[4]" = "1"
@@ -298,15 +178,6 @@ chip soc/intel/tigerlake
 			register "PcieClkSrcClkReq[1]" = "1"
 			register "PcieRpSlotImplemented[10]" = "1"
 		end
-		device ref pch_espi on
-			register "gen1_dec" = "0x00040069"
-			register "gen2_dec" = "0x00fc0E01"
-			register "gen3_dec" = "0x00fc0F01"
-			chip drivers/pc80/tpm
-				device pnp 0c31.0 on end
-			end
-		end
-		device ref p2sb on end
 		device ref pmc hidden
 			# The pmc_mux chip driver is a placeholder for the
 			# PMC.MUX device in the ACPI hierarchy.
@@ -322,10 +193,5 @@ chip soc/intel/tigerlake
 				end
 			end
 		end
-		device ref hda on
-			register "PchHdaAudioLinkHdaEnable" = "1"
-		end
-		device ref smbus on end
-		device ref fast_spi on end
 	end
 end

src/mainboard/system76/tgl-u/variants/galp5/romstage.c

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include "gpio.h"
+#include <variant/gpio.h>
 #include <drivers/gfx/nvidia/gpu.h>
 #include <fsp/util.h>
 #include <soc/meminit.h>