cbfs/vboot: remove firmware component support
The Chrome OS verified boot path supported multiple CBFS instances in the boot media as well as stand-alone assets sitting in each vboot RW slot. Remove the support for the stand-alone assets and always use CBFS accesses as the way to retrieve data. This is implemented by adding a cbfs_locator object which is queried for locating the current CBFS. Additionally, it is also signalled prior to when a program is about to be loaded by coreboot for the subsequent stage/payload. This provides the same opportunity as previous for vboot to hook in and perform its logic. BUG=chromium:445938 BRANCH=None TEST=Built and ran on glados. CQ-DEPEND=CL:307121,CL:31691,CL:31690 Change-Id: I6a3a15feb6edd355d6ec252c36b6f7885b383099 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12689 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@@ -21,14 +21,6 @@ config CHROMEOS
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select EC_SOFTWARE_SYNC
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select VIRTUAL_DEV_SWITCH
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config VBOOT_RAMSTAGE_INDEX
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hex
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default 0x2
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config VBOOT_REFCODE_INDEX
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hex
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default 0x3
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config MAINBOARD_DIR
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string
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default google/auron
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@@ -55,8 +55,4 @@ config TPM_PIRQ
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hex
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default 0x18 # GPP_E0_IRQ
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config VBOOT_RAMSTAGE_INDEX
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hex
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default 0x3
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endif
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@@ -76,13 +76,6 @@ config BOOT_MEDIA_SPI_CHIP_SELECT
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help
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Which chip select to use for boot media.
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# For foster, we are using vboot2. Thus, index for stages:
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# VBOOT_ROMSTAGE_INDEX -> Use default value of 0x2
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# VBOOT_RAMSTAGE_INDEX -> Use 0x3
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config VBOOT_RAMSTAGE_INDEX
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hex
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default 0x3
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config DRIVER_TPM_I2C_BUS
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hex
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default 0x2
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@@ -55,8 +55,4 @@ config TPM_PIRQ
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hex
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default 0x18 # GPP_E0_IRQ
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config VBOOT_RAMSTAGE_INDEX
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hex
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default 0x3
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endif
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@@ -50,8 +50,4 @@ config MAX_CPUS
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int
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default 8
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config VBOOT_RAMSTAGE_INDEX
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hex
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default 0x3
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endif
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@@ -83,17 +83,6 @@ config BOOT_MEDIA_SPI_CHIP_SELECT
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help
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Which chip select to use for boot media.
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# For smaug, we are using vboot2. Thus, index for stages:
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# VBOOT_ROMSTAGE_INDEX -> Use default value of 0x2
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# VBOOT_RAMSTAGE_INDEX -> Use 0x3
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config VBOOT_BL31_INDEX
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hex
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default 0x4
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config VBOOT_RAMSTAGE_INDEX
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hex
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default 0x3
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config DRIVER_TPM_I2C_BUS
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hex
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default 0x2
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@@ -50,8 +50,4 @@ config MAX_CPUS
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int
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default 8
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config VBOOT_RAMSTAGE_INDEX
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hex
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default 0x3
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endif
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@@ -40,8 +40,4 @@ config MAX_CPUS
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int
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default 8
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config VBOOT_RAMSTAGE_INDEX
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hex
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default 0x3
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endif
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@@ -47,12 +47,6 @@ config MAINBOARD_VENDOR
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string
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default "Intel"
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config VBOOT_RAMSTAGE_INDEX
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hex
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default 0x2
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config VBOOT_REFCODE_INDEX
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hex
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default 0x3
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if !GOP_SUPPORT
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config VGA_BIOS_FILE
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string
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