treewide: capitalize 'BIOS'
Also replace 'BIOS' by coreboot when the image is 'coreboot.rom'. Change-Id: I8303b7baa9671f19a036a59775026ffd63c85273 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38932 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
committed by
Patrick Georgi
parent
c7a3152273
commit
6dc9d0352e
@@ -32,7 +32,7 @@ Show only GPIO register differences from hardware defaults.
|
||||
Dump I/O Controller Hub (ICH) southbridge RCBA registers.
|
||||
.TP
|
||||
.B "\-s, \-\-spi"
|
||||
Dump I/O Controller Hub (ICH) southbridge SPI registers and bios control.
|
||||
Dump I/O Controller Hub (ICH) southbridge SPI registers and BIOS control.
|
||||
.TP
|
||||
.B "\-f, \-\-gfx"
|
||||
.RB "Dump graphics registers. " \
|
||||
|
@@ -22,7 +22,7 @@ static const io_register_t pch_bios_cntl_registers[] = {
|
||||
{ 0x1, 1, "BLE - lock enable" },
|
||||
{ 0x2, 2, "SPI Read configuration" },
|
||||
{ 0x4, 1, "TopSwapStatus" },
|
||||
{ 0x5, 1, "SMM Bios Write Protect Disable" },
|
||||
{ 0x5, 1, "SMM BIOS Write Protect Disable" },
|
||||
{ 0x6, 2, "reserved" },
|
||||
};
|
||||
|
||||
|
Reference in New Issue
Block a user