From 6dfc0aebb3cf4f0149b9c0408911c1bbc4f3a505 Mon Sep 17 00:00:00 2001 From: Ariel Fang Date: Tue, 14 Dec 2021 19:29:34 +0800 Subject: [PATCH] mb/google/brya/var/primus: Fix some GPIO programming After checking them against schematics, a few unused GPIOs that were inherited from the baseboard were missed, so this CL programs them as PAD_NC. GPP_B2 => non-use GPP_B15 => non-use (for FPR) GPP_D3 => non-use (Test point) GPP_E21 => non-use (for LCLW Detect) BUG=b:211721639 TEST= USE="project_primus" emerge-brya coreboot Signed-off-by: Ariel Fang Change-Id: I4e269bc6fb6eda7b2de57e1a9c900864d3e86e98 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60104 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Felix Singer --- src/mainboard/google/brya/variants/primus/gpio.c | 10 ++++++++-- src/mainboard/google/brya/variants/primus4es/gpio.c | 10 ++++++++-- 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/src/mainboard/google/brya/variants/primus/gpio.c b/src/mainboard/google/brya/variants/primus/gpio.c index 1abe369be9..e30163ca76 100644 --- a/src/mainboard/google/brya/variants/primus/gpio.c +++ b/src/mainboard/google/brya/variants/primus/gpio.c @@ -20,16 +20,20 @@ static const struct pad_config override_gpio_table[] = { /* A22 : DDPC_CTRLDATA ==> NC */ PAD_NC(GPP_A22, NONE), + /* B2 : VRALERT# ==> NC */ + PAD_NC(GPP_B2, NONE), /* B3 : PROC_GP2 ==> eMMC_PERST_L */ PAD_CFG_GPO(GPP_B3, 1, DEEP), + /* B15 : TIME_SYNC0 ==> NC */ + PAD_NC(GPP_B15, NONE), /* C3 : SML0CLK ==> NC */ PAD_NC(GPP_C3, NONE), /* C4 : SML0DATA ==> NC */ PAD_NC(GPP_C4, NONE), - /* D3 : ISH_GP3 ==> M2_SSD_PLN_L */ - PAD_CFG_GPO(GPP_D3, 1, PLTRST), + /* D3 : ISH_GP3 ==> NC */ + PAD_NC(GPP_D3, NONE), /* D5 : SRCCLKREQ0# ==> SSD_CLKREQ_ODL */ PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), /* D6 : SRCCLKREQ1# ==> NC */ @@ -45,6 +49,8 @@ static const struct pad_config override_gpio_table[] = { PAD_NC(GPP_E3, NONE), /* E7 : PROC_GP1 ==> NC */ PAD_NC(GPP_E7, NONE), + /* E21 : DDP2_CTRLDATA ==> NC */ + PAD_NC(GPP_E21, NONE), /* F19 : SRCCLKREQ6# ==> EMMC_CLKREQ_ODL */ PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1), diff --git a/src/mainboard/google/brya/variants/primus4es/gpio.c b/src/mainboard/google/brya/variants/primus4es/gpio.c index df0930c42f..f0d1c5d321 100644 --- a/src/mainboard/google/brya/variants/primus4es/gpio.c +++ b/src/mainboard/google/brya/variants/primus4es/gpio.c @@ -20,16 +20,20 @@ static const struct pad_config override_gpio_table[] = { /* A22 : DDPC_CTRLDATA ==> NC */ PAD_NC(GPP_A22, NONE), + /* B2 : VRALERT# ==> NC */ + PAD_NC(GPP_B2, NONE), /* B3 : PROC_GP2 ==> eMMC_PERST_L */ PAD_CFG_GPO(GPP_B3, 1, DEEP), + /* B15 : TIME_SYNC0 ==> NC */ + PAD_NC(GPP_B15, NONE), /* C3 : SML0CLK ==> NC */ PAD_NC(GPP_C3, NONE), /* C4 : SML0DATA ==> NC */ PAD_NC(GPP_C4, NONE), - /* D3 : ISH_GP3 ==> M2_SSD_PLN_L */ - PAD_CFG_GPO(GPP_D3, 1, PLTRST), + /* D3 : ISH_GP3 ==> NC */ + PAD_NC(GPP_D3, NONE), /* D5 : SRCCLKREQ0# ==> SSD_CLKREQ_ODL */ PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), /* D6 : SRCCLKREQ1# ==> NC */ @@ -45,6 +49,8 @@ static const struct pad_config override_gpio_table[] = { PAD_NC(GPP_E3, NONE), /* E7 : PROC_GP1 ==> NC */ PAD_NC(GPP_E7, NONE), + /* E21 : DDP2_CTRLDATA ==> NC */ + PAD_NC(GPP_E21, NONE), /* F19 : SRCCLKREQ6# ==> EMMC_CLKREQ_ODL */ PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),