drivers/uart: Use uart_platform_refclk for all UART models
Allow the platform to override the input clock for the UART by implementing the routine uart_platform_refclk and setting the Kconfig value UART_OVERRIDE_REFCLK. Provide a default uart_platform_refclk routine which is disabled when UART_OVERRIDE_REFCLK is selected. This works around ROMCC not supporting weak routines. Testing on Galileo: * Edit the src/mainboard/intel/galileo/Makefile.inc file: * Add "select ADD_FSP_PDAT_FILE" * Add "select ADD_FSP_RAW_BIN" * Add "select ADD_RMU_FILE" * Place the FSP.bin file in the location specified by CONFIG_FSP_FILE * Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate UEFIPAYLOAD.fd * Testing is successful when CorebootPayloadPkg is able to properly initialize the serial port without using built-in values. Change-Id: If4afc45a828e5ba935fecb6d95b239625e912d14 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/14612 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@@ -27,16 +27,6 @@
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/* Should support 8250, 16450, 16550, 16550A type UARTs */
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/* Nominal values only, good for the range of choices Kconfig offers for
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* set of standard baudrates.
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*/
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/* Multiply the maximim baud-rate by the default oversample rate to compute
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* the default input clock to the UART. The uart_baudrate_divisor divides
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* by the oversample clock to determine the final baud-rate.
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*/
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#define BAUDRATE_REFCLK (115200 * 16)
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/* Expected character delay at 1200bps is 9ms for a working UART
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* and no flow-control. Assume UART as stuck if shift register
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* or FIFO takes more than 50ms per character to appear empty.
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@@ -115,7 +105,7 @@ uintptr_t uart_platform_base(int idx)
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void uart_init(int idx)
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{
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unsigned int div;
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div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK,
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div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(),
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uart_input_clock_divider());
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uart8250_init(uart_platform_base(idx), div);
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}
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@@ -143,10 +133,7 @@ void uart_fill_lb(void *data)
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serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
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serial.baud = default_baudrate();
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serial.regwidth = 1;
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if (IS_ENABLED(CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK))
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serial.input_hertz = uart_platform_refclk();
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else
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serial.input_hertz = 0;
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serial.input_hertz = uart_platform_refclk();
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serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
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lb_add_serial(&serial, data);
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