intel/fsp1_0/cache_as_ram.inc: Use tabs instead of white spaces
Change-Id: I93cf734daefabe1f7cfaa5f49ba789ac04c8a635 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/30454 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
committed by
Kyösti Mälkki
parent
2ea751a588
commit
6ece0adf8c
@ -19,10 +19,10 @@
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#include <cpu/x86/cache.h>
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#include <cpu/x86/cache.h>
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#include <cpu/x86/post_code.h>
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#include <cpu/x86/post_code.h>
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cmp $0, %eax
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cmp $0, %eax
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je cache_as_ram
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je cache_as_ram
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mov $0xa0, %eax
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mov $0xa0, %eax
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jmp .Lhlt
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jmp .Lhlt
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cache_as_ram:
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cache_as_ram:
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post_code(0x20)
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post_code(0x20)
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@ -31,75 +31,75 @@ cache_as_ram:
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* Find the FSP binary in cbfs.
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* Find the FSP binary in cbfs.
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* Make a fake stack that has the return value back to this code.
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* Make a fake stack that has the return value back to this code.
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*/
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*/
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lea fake_fsp_stack, %esp
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lea fake_fsp_stack, %esp
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jmp find_fsp_bypass_prologue
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jmp find_fsp_bypass_prologue
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find_fsp_ret:
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find_fsp_ret:
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/* Save the FSP location */
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/* Save the FSP location */
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mov %eax, %ebp
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mov %eax, %ebp
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cmp $CONFIG_FSP_LOC, %eax
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cmp $CONFIG_FSP_LOC, %eax
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jae find_fsp_ok
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jae find_fsp_ok
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mov $0xb0, %eax
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mov $0xb0, %eax
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jmp .Lhlt
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jmp .Lhlt
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find_fsp_ok:
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find_fsp_ok:
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post_code(POST_FSP_TEMP_RAM_INIT)
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post_code(POST_FSP_TEMP_RAM_INIT)
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/* Calculate entry into FSP */
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/* Calculate entry into FSP */
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mov 0x30(%ebp), %eax /* Load TempRamInitEntry */
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mov 0x30(%ebp), %eax /* Load TempRamInitEntry */
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add 0x1c(%ebp), %eax /* add in the offset for the FSP base address */
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add 0x1c(%ebp), %eax /* add in the offset for the FSP base address */
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/*
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/*
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* Pass early init variables on a fake stack (no memory yet)
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* Pass early init variables on a fake stack (no memory yet)
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* as well as the return location
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* as well as the return location
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*/
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*/
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lea CAR_init_stack, %esp
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lea CAR_init_stack, %esp
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/* call FSP binary to setup temporary stack */
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/* call FSP binary to setup temporary stack */
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jmp *%eax
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jmp *%eax
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CAR_init_done:
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CAR_init_done:
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addl $4, %esp
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addl $4, %esp
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cmp $0, %eax
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cmp $0, %eax
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je car_init_ok
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je car_init_ok
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add $0xc0, %eax
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add $0xc0, %eax
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jmp .Lhlt
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jmp .Lhlt
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car_init_ok:
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car_init_ok:
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/* Save FSP_INFO_HEADER location in ebx */
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/* Save FSP_INFO_HEADER location in ebx */
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mov %ebp, %ebx
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mov %ebp, %ebx
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/*
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/*
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* set up bootloader stack
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* set up bootloader stack
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* ecx: stack base
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* ecx: stack base
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* edx: stack top
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* edx: stack top
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*/
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*/
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mov %edx, %esp
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mov %edx, %esp
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movl %esp, %ebp
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movl %esp, %ebp
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/* Clear the cbmem CAR memory region. */
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/* Clear the cbmem CAR memory region. */
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movl %ecx, %edi
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movl %ecx, %edi
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movl %edx, %ecx
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movl %edx, %ecx
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sub %edi, %ecx
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sub %edi, %ecx
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shr $2, %ecx
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shr $2, %ecx
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xorl %eax, %eax
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xorl %eax, %eax
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rep stosl
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rep stosl
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before_romstage:
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before_romstage:
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post_code(0x23)
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post_code(0x23)
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/* Call romstage.c main function. */
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/* Call romstage.c main function. */
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pushl %ebx /* main takes FSP_INFO_HEADER as its argument */
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pushl %ebx /* main takes FSP_INFO_HEADER as its argument */
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call main /* does not return */
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call main /* does not return */
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movb $0xB8, %ah
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movb $0xB8, %ah
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jmp .Lhlt
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jmp .Lhlt
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.Lhlt:
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.Lhlt:
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#if IS_ENABLED(CONFIG_POST_IO)
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#if IS_ENABLED(CONFIG_POST_IO)
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outb %al, $CONFIG_POST_IO_PORT
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outb %al, $CONFIG_POST_IO_PORT
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#endif
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#endif
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hlt
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hlt
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jmp .Lhlt
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jmp .Lhlt
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/*
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/*
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* esp is set to this location so that the call into and return from the FSP
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* esp is set to this location so that the call into and return from the FSP
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@ -107,17 +107,17 @@ before_romstage:
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*/
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*/
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.align 4
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.align 4
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fake_fsp_stack:
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fake_fsp_stack:
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.long find_fsp_ret
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.long find_fsp_ret
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CAR_init_params:
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CAR_init_params:
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.long dummy_microcode
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.long dummy_microcode
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.long 0
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.long 0
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.long CACHE_ROM_BASE /* Firmware Location */
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.long CACHE_ROM_BASE /* Firmware Location */
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.long CACHE_ROM_SIZE /* Total Firmware Length */
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.long CACHE_ROM_SIZE /* Total Firmware Length */
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CAR_init_stack:
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CAR_init_stack:
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.long CAR_init_done
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.long CAR_init_done
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.long CAR_init_params
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.long CAR_init_params
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dummy_microcode:
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dummy_microcode:
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.long 0
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.long 0
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