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src: Remove unnecessary semicolons from the end of macros

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Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ia005915a05d02725f77b52ccd7acebefaf25d058
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78964
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Martin Roth
2023-11-08 18:18:11 -07:00
committed by Felix Held
parent d205cf7e4e
commit 6fd7f11225
2 changed files with 2 additions and 2 deletions
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2
src/arch/arm64/include/armv8/arch/barrier.h
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@@ -24,7 +24,7 @@
#define barrier() __asm__ __volatile__("" : : : "memory") #define barrier() __asm__ __volatile__("" : : : "memory")
#endif #endif
#define nop() asm volatile("nop"); #define nop() asm volatile("nop")
#define force_read(x) (*(volatile typeof(x) *)&(x)) #define force_read(x) (*(volatile typeof(x) *)&(x))

2
src/include/cpu/intel/l2_cache.h
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@@ -44,7 +44,7 @@
#define BBLCR3_L2_SIZE_2M (0x08 << 13) #define BBLCR3_L2_SIZE_2M (0x08 << 13)
#define BBLCR3_L2_SIZE_4M (0x10 << 13) #define BBLCR3_L2_SIZE_4M (0x10 << 13)
/* bits [22:20] */ /* bits [22:20] */
#define BBLCR3_L2_PHYSICAL_RANGE (0x7 << 20); #define BBLCR3_L2_PHYSICAL_RANGE (0x7 << 20)
/* TODO: This bitmask does not agree with Intel's documentation. /* TODO: This bitmask does not agree with Intel's documentation.
* Get confirmation one way or another. * Get confirmation one way or another.
*/ */