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uart: Support multiple ports

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The port for console remains to be a compile time constant.
The Kconfig option is changed to select an UART port with index
to avoid putting map of UART base addresses in Kconfigs.

With this change it is possible to have other than debug console
on different UART port.

Change-Id: Ie1845a946f8d3b2604ef5404edb31b2e811f3ccd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5342
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Kyösti Mälkki
2014-03-14 22:28:29 +02:00
parent a8d089d3ac
commit 70342a7f51
19 changed files with 147 additions and 311 deletions
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49
src/cpu/allwinner/a10/Kconfig
View File

@@ -72,51 +72,8 @@ config SYS_SDRAM_BASE
hex
default 0x40000000
choice CONSOLE_SERIAL_UART_CHOICES
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART0
depends on CONSOLE_SERIAL
config CONSOLE_SERIAL_UART0
bool "UART0"
help
Serial console on UART0
config CONSOLE_SERIAL_UART1
bool "UART1"
help
Serial console on UART1
config CONSOLE_SERIAL_UART2
bool "UART2"
help
Serial console on UART2
config CONSOLE_SERIAL_UART3
bool "UART3"
help
Serial console on UART3
config CONSOLE_SERIAL_UART4
bool "UART4"
help
Serial console on UART4
config CONSOLE_SERIAL_UART5
bool "UART5"
help
Serial console on UART5
config CONSOLE_SERIAL_UART6
bool "UART6"
help
Serial console on UART6
config CONSOLE_SERIAL_UART7
bool "UART7"
help
Serial console on UART7
endchoice
config UART_FOR_CONSOLE
int
default 0
endif # if CPU_ALLWINNER_A10

48
src/cpu/allwinner/a10/uart_console.c
View File

@@ -14,28 +14,13 @@
#include <cpu/allwinner/a10/uart.h>
static void *get_console_uart_base_addr(void)
unsigned int uart_platform_base(int idx)
{
/* This big block gets compiled to a constant, not a function call */
if (CONFIG_CONSOLE_SERIAL_UART0)
return (void *)A1X_UART0_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART1)
return (void *)A1X_UART1_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART2)
return (void *)A1X_UART2_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART3)
return (void *)A1X_UART3_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART4)
return (void *)A1X_UART4_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART5)
return (void *)A1X_UART5_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART6)
return (void *)A1X_UART6_BASE;
else if (CONFIG_CONSOLE_SERIAL_UART7)
return (void *)A1X_UART7_BASE;
/* If selection is invalid, default to UART0 */
return (void *)A1X_UART0_BASE;
/* UART blocks are mapped 0x400 bytes apart */
if (idx < 8)
return A1X_UART0_BASE + 0x400 * idx;
else
return 0;
}
/* FIXME: We assume clock is 24MHz, which may not be the case. */
@@ -44,14 +29,9 @@ unsigned int uart_platform_refclk(void)
return 24000000;
}
unsigned int uart_platform_base(int idx)
void uart_init(int idx)
{
return (unsigned int)get_console_uart_base_addr();
}
void uart_init(void)
{
void *uart_base = get_console_uart_base_addr();
void *uart_base = uart_platform_baseptr(idx);
/* Use default 8N1 encoding */
a10_uart_configure(uart_base, default_baudrate(),
@@ -59,17 +39,17 @@ void uart_init(void)
a10_uart_enable_fifos(uart_base);
}
unsigned char uart_rx_byte(void)
unsigned char uart_rx_byte(int idx)
{
return a10_uart_rx_blocking(get_console_uart_base_addr());
return a10_uart_rx_blocking(uart_platform_baseptr(idx));
}
void uart_tx_byte(unsigned char data)
void uart_tx_byte(int idx, unsigned char data)
{
a10_uart_tx_blocking(get_console_uart_base_addr(), data);
a10_uart_tx_blocking(uart_platform_baseptr(idx), data);
}
void uart_tx_flush(void)
void uart_tx_flush(int idx)
{
}
@@ -78,7 +58,7 @@ void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(0);
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
lb_add_serial(&serial, data);