We call this cache as ram everywhere, so let's call it the same in Kconfig

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5756 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/Kconfig

@@ -3,7 +3,7 @@ source src/cpu/intel/Kconfig
 source src/cpu/via/Kconfig
 source src/cpu/x86/Kconfig
 
-config USE_DCACHE_RAM
+config CACHE_AS_RAM
 	bool
 	default !ROMCC
 

src/cpu/amd/model_10xxx/Kconfig

@@ -1,6 +1,6 @@
 config CPU_AMD_MODEL_10XXX
 	bool
-	select USE_DCACHE_RAM
+	select CACHE_AS_RAM
 	select SSE
 	select SSE2
 

src/cpu/amd/model_fxx/Kconfig

@@ -1,6 +1,6 @@
 config CPU_AMD_MODEL_FXX
 	bool
-	select USE_DCACHE_RAM
+	select CACHE_AS_RAM
 	select MMX
 	select SSE
 	select SSE2

src/cpu/amd/model_gx2/syspreinit.c

@@ -16,7 +16,7 @@ static void StartTimer1(void)
 void SystemPreInit(void)
 {
 	/* they want a jump ... */
-#ifndef CONFIG_USE_DCACHE_RAM
+#ifndef CONFIG_CACHE_AS_RAM
 	__asm__ __volatile__("jmp .+2\ninvd\njmp .+2\n");
 #endif
 	StartTimer1();

src/cpu/amd/model_lx/syspreinit.c

@@ -39,7 +39,7 @@ void SystemPreInit(void)
 {
 
 	/* they want a jump ... */
-#ifndef CONFIG_USE_DCACHE_RAM
+#ifndef CONFIG_CACHE_AS_RAM
 	__asm__ __volatile__("jmp .+2\ninvd\njmp .+2\n");
 #endif
 	StartTimer1();

src/cpu/intel/socket_FC_PGA370/Kconfig

@@ -23,7 +23,7 @@ config CPU_INTEL_SOCKET_FC_PGA370
 	select CPU_INTEL_MODEL_68X
 	select MMX
 	select SSE
-	select USE_DCACHE_RAM
+	select CACHE_AS_RAM
 	select TINY_BOOTBLOCK
 
 config DCACHE_RAM_BASE

src/cpu/x86/mtrr/earlymtrr.c

@@ -62,7 +62,7 @@ static inline void cache_lbmem(int type)
 	enable_cache();
 }
 
-#if !defined(CONFIG_USE_DCACHE_RAM) || (CONFIG_USE_DCACHE_RAM == 0)
+#if !defined(CONFIG_CACHE_AS_RAM) || (CONFIG_CACHE_AS_RAM == 0)
 /* the fixed and variable MTTRs are power-up with random values,
  * clear them to MTRR_TYPE_UNCACHEABLE for safty.
  */