Add CMOS option for switching displayport output
This commit is contained in:
@@ -5,10 +5,12 @@ config BOARD_SPECIFIC_OPTIONS
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select ADD_FSP_BINARIES
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select ADD_FSP_BINARIES
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select BOARD_ROMSIZE_KB_8192
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select BOARD_ROMSIZE_KB_8192
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select EC_ACPI
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select EC_ACPI
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select EXCLUDE_EMMC_INTERFACE
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select FSP_USE_REPO
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select FSP_USE_REPO
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_TABLES
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# select HAVE_CMOS_DEFAULT
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select HAVE_CMOS_DEFAULT
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select HAVE_OPTION_TABLE
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select HAVE_SMI_HANDLER
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select HAVE_SMI_HANDLER
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select INTEL_GMA_HAVE_VBT
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select INTEL_GMA_HAVE_VBT
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select MAINBOARD_HAS_LPC_TPM
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select MAINBOARD_HAS_LPC_TPM
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@@ -20,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS
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select SPD_READ_BY_WORD
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select SPD_READ_BY_WORD
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select SYSTEM_TYPE_LAPTOP
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select SYSTEM_TYPE_LAPTOP
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select USE_BLOBS
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select USE_BLOBS
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select USE_OPTION_TABLE
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config MAINBOARD_DIR
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config MAINBOARD_DIR
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string
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string
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1
src/mainboard/system76/kbl-u/cmos.default
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1
src/mainboard/system76/kbl-u/cmos.default
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@@ -0,0 +1 @@
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DisplayPort_Output=Mini_DisplayPort
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33
src/mainboard/system76/kbl-u/cmos.layout
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33
src/mainboard/system76/kbl-u/cmos.layout
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@@ -0,0 +1,33 @@
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#*****************************************************************************
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#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2019 System76
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#*****************************************************************************
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entries
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#start length type id name
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0 384 r 0 reserved_memory
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384 1 e 1 DisplayPort_Output
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984 16 h 0 check_sum
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enumerations
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#ID value text
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1 0 Mini_DisplayPort
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1 1 USB-C
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checksums
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#checksum start end location
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checksum 384 983 984
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@@ -14,6 +14,7 @@
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*/
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*/
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#include <device/device.h>
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#include <device/device.h>
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#include <option.h>
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#include <pc80/keyboard.h>
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#include <pc80/keyboard.h>
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#include <soc/ramstage.h>
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#include <soc/ramstage.h>
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#include "gpio.h"
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#include "gpio.h"
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@@ -26,6 +27,21 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params) {
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static void mainboard_enable(struct device *dev) {
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static void mainboard_enable(struct device *dev) {
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pc_keyboard_init(NO_AUX_DEVICE);
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pc_keyboard_init(NO_AUX_DEVICE);
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uint32_t config = 0x44000200;
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uint8_t nvram = 0;
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if (get_option(&nvram, "DisplayPort_Output") == CB_SUCCESS) {
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if (nvram) {
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config |= 1;
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}
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}
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struct pad_config displayport_gpio_table[] = {
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/* PS8338B_SW */
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_PAD_CFG_STRUCT(GPP_A22, config, 0x0),
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};
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gpio_configure_pads(displayport_gpio_table, ARRAY_SIZE(displayport_gpio_table));
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}
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}
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struct chip_operations mainboard_ops = {
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struct chip_operations mainboard_ops = {
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@@ -9,7 +9,8 @@ config BOARD_SPECIFIC_OPTIONS
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select FSP_USE_REPO
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select FSP_USE_REPO
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_TABLES
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# select HAVE_CMOS_DEFAULT
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select HAVE_CMOS_DEFAULT
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select HAVE_OPTION_TABLE
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select HAVE_SMI_HANDLER
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select HAVE_SMI_HANDLER
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select INTEL_GMA_HAVE_VBT
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select INTEL_GMA_HAVE_VBT
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# select MAINBOARD_HAS_SPI_TPM_CR50
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# select MAINBOARD_HAS_SPI_TPM_CR50
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@@ -17,8 +18,10 @@ config BOARD_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_BLOCK_HDA
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select SOC_INTEL_COMMON_BLOCK_HDA
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select SOC_INTEL_WHISKEYLAKE
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select SOC_INTEL_WHISKEYLAKE
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select SPD_READ_BY_WORD
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select SYSTEM_TYPE_LAPTOP
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select SYSTEM_TYPE_LAPTOP
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select USE_BLOBS
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select USE_BLOBS
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select USE_OPTION_TABLE
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config MAINBOARD_DIR
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config MAINBOARD_DIR
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string
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string
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1
src/mainboard/system76/whl-u/cmos.default
Normal file
1
src/mainboard/system76/whl-u/cmos.default
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@@ -0,0 +1 @@
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DisplayPort_Output=Mini_DisplayPort
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33
src/mainboard/system76/whl-u/cmos.layout
Normal file
33
src/mainboard/system76/whl-u/cmos.layout
Normal file
@@ -0,0 +1,33 @@
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#*****************************************************************************
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#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2019 System76
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#
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||||||
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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||||||
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#
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||||||
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# This program is distributed in the hope that it will be useful,
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||||||
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#*****************************************************************************
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entries
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#start length type id name
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0 384 r 0 reserved_memory
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384 1 e 1 DisplayPort_Output
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984 16 h 0 check_sum
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enumerations
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#ID value text
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1 0 Mini_DisplayPort
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1 1 USB-C
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checksums
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#checksum start end location
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checksum 384 983 984
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@@ -14,6 +14,7 @@
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*/
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*/
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#include <device/device.h>
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#include <device/device.h>
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#include <option.h>
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#include <pc80/keyboard.h>
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#include <pc80/keyboard.h>
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#include <soc/ramstage.h>
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#include <soc/ramstage.h>
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#include "gpio.h"
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#include "gpio.h"
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@@ -26,6 +27,21 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params) {
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static void mainboard_enable(struct device *dev) {
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static void mainboard_enable(struct device *dev) {
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pc_keyboard_init(NO_AUX_DEVICE);
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pc_keyboard_init(NO_AUX_DEVICE);
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uint32_t config = 0x44000200;
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uint8_t nvram = 0;
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if (get_option(&nvram, "DisplayPort_Output") == CB_SUCCESS) {
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if (nvram) {
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config |= 1;
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}
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}
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struct pad_config displayport_gpio_table[] = {
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/* PS8338B_SW */
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_PAD_CFG_STRUCT(GPP_A22, config, 0x0),
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};
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gpio_configure_pads(displayport_gpio_table, ARRAY_SIZE(displayport_gpio_table));
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}
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}
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struct chip_operations mainboard_ops = {
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struct chip_operations mainboard_ops = {
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