Add CMOS option for switching displayport output

This commit is contained in:
Jeremy Soller
2019-03-02 09:34:26 -07:00
parent 664ff99070
commit 711625b985
8 changed files with 108 additions and 2 deletions

View File

@@ -5,10 +5,12 @@ config BOARD_SPECIFIC_OPTIONS
select ADD_FSP_BINARIES select ADD_FSP_BINARIES
select BOARD_ROMSIZE_KB_8192 select BOARD_ROMSIZE_KB_8192
select EC_ACPI select EC_ACPI
select EXCLUDE_EMMC_INTERFACE
select FSP_USE_REPO select FSP_USE_REPO
select HAVE_ACPI_RESUME select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES
# select HAVE_CMOS_DEFAULT select HAVE_CMOS_DEFAULT
select HAVE_OPTION_TABLE
select HAVE_SMI_HANDLER select HAVE_SMI_HANDLER
select INTEL_GMA_HAVE_VBT select INTEL_GMA_HAVE_VBT
select MAINBOARD_HAS_LPC_TPM select MAINBOARD_HAS_LPC_TPM
@@ -20,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS
select SPD_READ_BY_WORD select SPD_READ_BY_WORD
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select USE_BLOBS select USE_BLOBS
select USE_OPTION_TABLE
config MAINBOARD_DIR config MAINBOARD_DIR
string string

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@@ -0,0 +1 @@
DisplayPort_Output=Mini_DisplayPort

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@@ -0,0 +1,33 @@
#*****************************************************************************
#
# This file is part of the coreboot project.
#
# Copyright (C) 2019 System76
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#*****************************************************************************
entries
#start length type id name
0 384 r 0 reserved_memory
384 1 e 1 DisplayPort_Output
984 16 h 0 check_sum
enumerations
#ID value text
1 0 Mini_DisplayPort
1 1 USB-C
checksums
#checksum start end location
checksum 384 983 984

View File

@@ -14,6 +14,7 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include <option.h>
#include <pc80/keyboard.h> #include <pc80/keyboard.h>
#include <soc/ramstage.h> #include <soc/ramstage.h>
#include "gpio.h" #include "gpio.h"
@@ -26,6 +27,21 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params) {
static void mainboard_enable(struct device *dev) { static void mainboard_enable(struct device *dev) {
pc_keyboard_init(NO_AUX_DEVICE); pc_keyboard_init(NO_AUX_DEVICE);
uint32_t config = 0x44000200;
uint8_t nvram = 0;
if (get_option(&nvram, "DisplayPort_Output") == CB_SUCCESS) {
if (nvram) {
config |= 1;
}
}
struct pad_config displayport_gpio_table[] = {
/* PS8338B_SW */
_PAD_CFG_STRUCT(GPP_A22, config, 0x0),
};
gpio_configure_pads(displayport_gpio_table, ARRAY_SIZE(displayport_gpio_table));
} }
struct chip_operations mainboard_ops = { struct chip_operations mainboard_ops = {

View File

@@ -9,7 +9,8 @@ config BOARD_SPECIFIC_OPTIONS
select FSP_USE_REPO select FSP_USE_REPO
select HAVE_ACPI_RESUME select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES
# select HAVE_CMOS_DEFAULT select HAVE_CMOS_DEFAULT
select HAVE_OPTION_TABLE
select HAVE_SMI_HANDLER select HAVE_SMI_HANDLER
select INTEL_GMA_HAVE_VBT select INTEL_GMA_HAVE_VBT
# select MAINBOARD_HAS_SPI_TPM_CR50 # select MAINBOARD_HAS_SPI_TPM_CR50
@@ -17,8 +18,10 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_HDA select SOC_INTEL_COMMON_BLOCK_HDA
select SOC_INTEL_COMMON_BLOCK_HDA_VERB select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SOC_INTEL_WHISKEYLAKE select SOC_INTEL_WHISKEYLAKE
select SPD_READ_BY_WORD
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select USE_BLOBS select USE_BLOBS
select USE_OPTION_TABLE
config MAINBOARD_DIR config MAINBOARD_DIR
string string

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@@ -0,0 +1 @@
DisplayPort_Output=Mini_DisplayPort

View File

@@ -0,0 +1,33 @@
#*****************************************************************************
#
# This file is part of the coreboot project.
#
# Copyright (C) 2019 System76
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#*****************************************************************************
entries
#start length type id name
0 384 r 0 reserved_memory
384 1 e 1 DisplayPort_Output
984 16 h 0 check_sum
enumerations
#ID value text
1 0 Mini_DisplayPort
1 1 USB-C
checksums
#checksum start end location
checksum 384 983 984

View File

@@ -14,6 +14,7 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include <option.h>
#include <pc80/keyboard.h> #include <pc80/keyboard.h>
#include <soc/ramstage.h> #include <soc/ramstage.h>
#include "gpio.h" #include "gpio.h"
@@ -26,6 +27,21 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params) {
static void mainboard_enable(struct device *dev) { static void mainboard_enable(struct device *dev) {
pc_keyboard_init(NO_AUX_DEVICE); pc_keyboard_init(NO_AUX_DEVICE);
uint32_t config = 0x44000200;
uint8_t nvram = 0;
if (get_option(&nvram, "DisplayPort_Output") == CB_SUCCESS) {
if (nvram) {
config |= 1;
}
}
struct pad_config displayport_gpio_table[] = {
/* PS8338B_SW */
_PAD_CFG_STRUCT(GPP_A22, config, 0x0),
};
gpio_configure_pads(displayport_gpio_table, ARRAY_SIZE(displayport_gpio_table));
} }
struct chip_operations mainboard_ops = { struct chip_operations mainboard_ops = {