Add CMOS option for switching displayport output
This commit is contained in:
@@ -5,10 +5,12 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select ADD_FSP_BINARIES
|
||||
select BOARD_ROMSIZE_KB_8192
|
||||
select EC_ACPI
|
||||
select EXCLUDE_EMMC_INTERFACE
|
||||
select FSP_USE_REPO
|
||||
select HAVE_ACPI_RESUME
|
||||
select HAVE_ACPI_TABLES
|
||||
# select HAVE_CMOS_DEFAULT
|
||||
select HAVE_CMOS_DEFAULT
|
||||
select HAVE_OPTION_TABLE
|
||||
select HAVE_SMI_HANDLER
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
@@ -20,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SPD_READ_BY_WORD
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
select USE_BLOBS
|
||||
select USE_OPTION_TABLE
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
1
src/mainboard/system76/kbl-u/cmos.default
Normal file
1
src/mainboard/system76/kbl-u/cmos.default
Normal file
@@ -0,0 +1 @@
|
||||
DisplayPort_Output=Mini_DisplayPort
|
33
src/mainboard/system76/kbl-u/cmos.layout
Normal file
33
src/mainboard/system76/kbl-u/cmos.layout
Normal file
@@ -0,0 +1,33 @@
|
||||
#*****************************************************************************
|
||||
#
|
||||
# This file is part of the coreboot project.
|
||||
#
|
||||
# Copyright (C) 2019 System76
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; version 2 of the License.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#*****************************************************************************
|
||||
|
||||
entries
|
||||
|
||||
#start length type id name
|
||||
0 384 r 0 reserved_memory
|
||||
384 1 e 1 DisplayPort_Output
|
||||
984 16 h 0 check_sum
|
||||
|
||||
enumerations
|
||||
|
||||
#ID value text
|
||||
1 0 Mini_DisplayPort
|
||||
1 1 USB-C
|
||||
|
||||
checksums
|
||||
|
||||
#checksum start end location
|
||||
checksum 384 983 984
|
@@ -14,6 +14,7 @@
|
||||
*/
|
||||
|
||||
#include <device/device.h>
|
||||
#include <option.h>
|
||||
#include <pc80/keyboard.h>
|
||||
#include <soc/ramstage.h>
|
||||
#include "gpio.h"
|
||||
@@ -26,6 +27,21 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params) {
|
||||
|
||||
static void mainboard_enable(struct device *dev) {
|
||||
pc_keyboard_init(NO_AUX_DEVICE);
|
||||
|
||||
uint32_t config = 0x44000200;
|
||||
|
||||
uint8_t nvram = 0;
|
||||
if (get_option(&nvram, "DisplayPort_Output") == CB_SUCCESS) {
|
||||
if (nvram) {
|
||||
config |= 1;
|
||||
}
|
||||
}
|
||||
|
||||
struct pad_config displayport_gpio_table[] = {
|
||||
/* PS8338B_SW */
|
||||
_PAD_CFG_STRUCT(GPP_A22, config, 0x0),
|
||||
};
|
||||
gpio_configure_pads(displayport_gpio_table, ARRAY_SIZE(displayport_gpio_table));
|
||||
}
|
||||
|
||||
struct chip_operations mainboard_ops = {
|
||||
|
@@ -9,7 +9,8 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select FSP_USE_REPO
|
||||
select HAVE_ACPI_RESUME
|
||||
select HAVE_ACPI_TABLES
|
||||
# select HAVE_CMOS_DEFAULT
|
||||
select HAVE_CMOS_DEFAULT
|
||||
select HAVE_OPTION_TABLE
|
||||
select HAVE_SMI_HANDLER
|
||||
select INTEL_GMA_HAVE_VBT
|
||||
# select MAINBOARD_HAS_SPI_TPM_CR50
|
||||
@@ -17,8 +18,10 @@ config BOARD_SPECIFIC_OPTIONS
|
||||
select SOC_INTEL_COMMON_BLOCK_HDA
|
||||
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
|
||||
select SOC_INTEL_WHISKEYLAKE
|
||||
select SPD_READ_BY_WORD
|
||||
select SYSTEM_TYPE_LAPTOP
|
||||
select USE_BLOBS
|
||||
select USE_OPTION_TABLE
|
||||
|
||||
config MAINBOARD_DIR
|
||||
string
|
||||
|
1
src/mainboard/system76/whl-u/cmos.default
Normal file
1
src/mainboard/system76/whl-u/cmos.default
Normal file
@@ -0,0 +1 @@
|
||||
DisplayPort_Output=Mini_DisplayPort
|
33
src/mainboard/system76/whl-u/cmos.layout
Normal file
33
src/mainboard/system76/whl-u/cmos.layout
Normal file
@@ -0,0 +1,33 @@
|
||||
#*****************************************************************************
|
||||
#
|
||||
# This file is part of the coreboot project.
|
||||
#
|
||||
# Copyright (C) 2019 System76
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; version 2 of the License.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#*****************************************************************************
|
||||
|
||||
entries
|
||||
|
||||
#start length type id name
|
||||
0 384 r 0 reserved_memory
|
||||
384 1 e 1 DisplayPort_Output
|
||||
984 16 h 0 check_sum
|
||||
|
||||
enumerations
|
||||
|
||||
#ID value text
|
||||
1 0 Mini_DisplayPort
|
||||
1 1 USB-C
|
||||
|
||||
checksums
|
||||
|
||||
#checksum start end location
|
||||
checksum 384 983 984
|
@@ -14,6 +14,7 @@
|
||||
*/
|
||||
|
||||
#include <device/device.h>
|
||||
#include <option.h>
|
||||
#include <pc80/keyboard.h>
|
||||
#include <soc/ramstage.h>
|
||||
#include "gpio.h"
|
||||
@@ -26,6 +27,21 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params) {
|
||||
|
||||
static void mainboard_enable(struct device *dev) {
|
||||
pc_keyboard_init(NO_AUX_DEVICE);
|
||||
|
||||
uint32_t config = 0x44000200;
|
||||
|
||||
uint8_t nvram = 0;
|
||||
if (get_option(&nvram, "DisplayPort_Output") == CB_SUCCESS) {
|
||||
if (nvram) {
|
||||
config |= 1;
|
||||
}
|
||||
}
|
||||
|
||||
struct pad_config displayport_gpio_table[] = {
|
||||
/* PS8338B_SW */
|
||||
_PAD_CFG_STRUCT(GPP_A22, config, 0x0),
|
||||
};
|
||||
gpio_configure_pads(displayport_gpio_table, ARRAY_SIZE(displayport_gpio_table));
|
||||
}
|
||||
|
||||
struct chip_operations mainboard_ops = {
|
||||
|
Reference in New Issue
Block a user