src: Make use of 'CEIL_DIV(a, b)' macro across tree

The objective here is to tighten coreboot up a bit by not repeating
common helpers. This makes the code base more consistent and
unified/tight.

Change-Id: Ia163eae68b4a84a00ed118125e70308fab1cea0c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6215
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Edward O'Callaghan
2014-07-08 01:53:24 +10:00
parent c805e62f9d
commit 7116ac8037
12 changed files with 43 additions and 56 deletions

View File

@@ -159,11 +159,6 @@ static const struct {
{ PLL1_CFG(20, 4, 1, 0), 1944 },
};
static inline u32 div_ceil(u32 a, u32 b)
{
return (a + b - 1) / b;
}
static void cpu_clk_src_switch(u32 clksel_bits)
{
u32 reg32;
@@ -241,8 +236,8 @@ void a1x_set_cpu_clock(u16 cpu_clk_mhz)
* will always be in spec, as long as AHB is in spec, although the max
* AHB0 clock we can get is 125 MHz
*/
axi = div_ceil(actual_mhz, 450); /* Max 450 MHz */
ahb = div_ceil(actual_mhz/axi, 250); /* Max 250 MHz */
axi = CEIL_DIV(actual_mhz, 450); /* Max 450 MHz */
ahb = CEIL_DIV(actual_mhz/axi, 250); /* Max 250 MHz */
apb0 = 2; /* Max 150 MHz */
ahb_exp = log2_ceil(ahb);