soc/intel: Expand SA_DEV_ROOT for ramstage
We do not want to disguise somewhat complex function calls as simple macros. Change-Id: I298f7f9a1c6a64cfba454e919eeaedc7bb2d4801 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
committed by
Martin Roth
parent
6046eb405a
commit
71756c21af
@@ -32,19 +32,22 @@
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u8 systemagent_revision(void)
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{
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return pci_read_config8(SA_DEV_ROOT, PCI_REVISION_ID);
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struct device *sa_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
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return pci_read_config8(sa_dev, PCI_REVISION_ID);
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}
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uintptr_t sa_get_tolud_base(void)
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{
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struct device *sa_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
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/* Bit 0 is lock bit, not part of address */
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return pci_read_config32(SA_DEV_ROOT, TOLUD) & ~1;
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return pci_read_config32(sa_dev, TOLUD) & ~1;
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}
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uintptr_t sa_get_gsm_base(void)
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{
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struct device *sa_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
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/* Bit 0 is lock bit, not part of address */
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return pci_read_config32(SA_DEV_ROOT, BGSM) & ~1;
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return pci_read_config32(sa_dev, BGSM) & ~1;
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}
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static int get_pcie_bar(struct device *dev, unsigned int index, u32 *base,
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@@ -291,6 +294,7 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt)
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uint64_t mc_values[NUM_MAP_ENTRIES];
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unsigned long dpr_size = 0;
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u32 dpr_reg;
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struct device *sa_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
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/* Read in the MAP registers and report their values. */
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mc_read_map_entries(dev, &mc_values[0]);
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@@ -302,7 +306,7 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt)
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* the DPR register reports the TOP of the region, which is the same
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* as TSEG base. The region size is reported in MiB in bits 11:4.
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*/
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dpr_reg = pci_read_config32(SA_DEV_ROOT, DPR);
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dpr_reg = pci_read_config32(sa_dev, DPR);
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if (dpr_reg & DPR_EPM) {
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dpr_size = (dpr_reg & DPR_SIZE_MASK) << 16;
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printk(BIOS_INFO, "DPR SIZE: 0x%lx\n", dpr_size);
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