inteltool: add 300 and C240 Series PCH
Values from - Intel doc 337347 rev4 - coreboot soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h On Coffeelake H (using Cannonlake / Cannonpoint PCH) p2sb is not accessible. Using a static value instead. 0xfd000000 is a common value chosen by coreboot and non-coreboot firmware. Change-Id: Id637f703ab0a99eb0908ecdc3da27ba80db1c6b8 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31500 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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Patrick Georgi
parent
02bd77379b
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725369fd0c
@@ -165,6 +165,18 @@ static inline uint32_t inl(unsigned port)
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#define PCI_DEVICE_ID_INTEL_HM175 0xa152
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#define PCI_DEVICE_ID_INTEL_QM175 0xa153
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#define PCI_DEVICE_ID_INTEL_CM238 0xa154
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#define PCI_DEVICE_ID_INTEL_H310 0xa303
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#define PCI_DEVICE_ID_INTEL_H370 0xa304
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#define PCI_DEVICE_ID_INTEL_Z390 0xa305
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#define PCI_DEVICE_ID_INTEL_Q370 0xa306
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#define PCI_DEVICE_ID_INTEL_B360 0xa308
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#define PCI_DEVICE_ID_INTEL_C246 0xa309
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#define PCI_DEVICE_ID_INTEL_C242 0xa30a
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#define PCI_DEVICE_ID_INTEL_QM370 0xa30c
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#define PCI_DEVICE_ID_INTEL_HM370 0xa30d
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#define PCI_DEVICE_ID_INTEL_CM246 0xa30e
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#define PCI_DEVICE_ID_INTEL_82810 0x7120
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#define PCI_DEVICE_ID_INTEL_82810_DC 0x7122
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#define PCI_DEVICE_ID_INTEL_82810E_DC 0x7124
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