Add a generic register script handler
This is based on the RCBA configuration setup from haswell. It handles PCI, BARs, IO, MMIO, and baytrail-specific IOSF. I did not extend it to handle MSR yet but that would be another potential register type. There are a number of approaches to this kind of thing, but in the end they have a lot of switch statements and a mass of #defines. I'm not particularly set on any of the details so comments welcome. BUG=chrome-os-partner:23635 BRANCH=rambi TEST=emerge-rambi chromeos-coreboot-rambi Change-Id: Ib873936ecf20fc996a8feeb72b9d04ddb523211f Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175206 Commit-Queue: Aaron Durbin <adurbin@chromium.org> Tested-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4923 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Duncan Laurie
committed by
Aaron Durbin
Aaron Durbin
parent
0567c91b22
commit
7274800ea3
418
src/lib/reg_script.c
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418
src/lib/reg_script.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <delay.h>
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#include <device/device.h>
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#include <device/resource.h>
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#include <device/pci.h>
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#include <stdint.h>
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#include <reg_script.h>
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#if CONFIG_SOC_INTEL_BAYTRAIL
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#include <baytrail/iosf.h>
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#endif
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#define POLL_DELAY 100 /* 100us */
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#if defined(__PRE_RAM__)
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#define EMPTY_DEV 0
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#else
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#define EMPTY_DEV NULL
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#endif
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struct reg_script_context {
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device_t dev;
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struct resource *res;
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const struct reg_script *step;
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};
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static inline void reg_script_set_dev(struct reg_script_context *ctx,
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device_t dev)
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{
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ctx->dev = dev;
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ctx->res = NULL;
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}
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static inline void reg_script_set_step(struct reg_script_context *ctx,
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const struct reg_script *step)
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{
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ctx->step = step;
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}
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static inline const struct reg_script *
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reg_script_get_step(struct reg_script_context *ctx)
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{
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return ctx->step;
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}
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static struct resource *reg_script_get_resource(struct reg_script_context *ctx)
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{
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#if defined(__PRE_RAM__)
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return NULL;
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#else
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struct resource *res;
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const struct reg_script *step = reg_script_get_step(ctx);
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res = ctx->res;
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if (res != NULL && res->index == step->res_index)
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return res;
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res = find_resource(ctx->dev, step->res_index);
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ctx->res = res;
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return res;
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#endif
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}
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static uint32_t reg_script_read_pci(struct reg_script_context *ctx)
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{
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const struct reg_script *step = reg_script_get_step(ctx);
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switch (step->size) {
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case REG_SCRIPT_SIZE_8:
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return pci_read_config8(ctx->dev, step->reg);
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case REG_SCRIPT_SIZE_16:
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return pci_read_config16(ctx->dev, step->reg);
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case REG_SCRIPT_SIZE_32:
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return pci_read_config32(ctx->dev, step->reg);
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}
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return 0;
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}
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static void reg_script_write_pci(struct reg_script_context *ctx)
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{
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const struct reg_script *step = reg_script_get_step(ctx);
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switch (step->size) {
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case REG_SCRIPT_SIZE_8:
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pci_write_config8(ctx->dev, step->reg, step->value);
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break;
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case REG_SCRIPT_SIZE_16:
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pci_write_config16(ctx->dev, step->reg, step->value);
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break;
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case REG_SCRIPT_SIZE_32:
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pci_write_config32(ctx->dev, step->reg, step->value);
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break;
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}
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}
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static uint32_t reg_script_read_io(struct reg_script_context *ctx)
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{
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const struct reg_script *step = reg_script_get_step(ctx);
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switch (step->size) {
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case REG_SCRIPT_SIZE_8:
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return inb(step->reg);
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case REG_SCRIPT_SIZE_16:
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return inw(step->reg);
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case REG_SCRIPT_SIZE_32:
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return inl(step->reg);
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}
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return 0;
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}
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static void reg_script_write_io(struct reg_script_context *ctx)
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{
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const struct reg_script *step = reg_script_get_step(ctx);
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switch (step->size) {
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case REG_SCRIPT_SIZE_8:
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outb(step->value, step->reg);
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break;
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case REG_SCRIPT_SIZE_16:
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outw(step->value, step->reg);
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break;
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case REG_SCRIPT_SIZE_32:
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outl(step->value, step->reg);
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break;
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}
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}
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static uint32_t reg_script_read_mmio(struct reg_script_context *ctx)
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{
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const struct reg_script *step = reg_script_get_step(ctx);
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switch (step->size) {
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case REG_SCRIPT_SIZE_8:
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return read8(step->reg);
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case REG_SCRIPT_SIZE_16:
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return read16(step->reg);
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case REG_SCRIPT_SIZE_32:
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return read32(step->reg);
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}
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return 0;
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}
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static void reg_script_write_mmio(struct reg_script_context *ctx)
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{
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const struct reg_script *step = reg_script_get_step(ctx);
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switch (step->size) {
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case REG_SCRIPT_SIZE_8:
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write8(step->reg, step->value);
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break;
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case REG_SCRIPT_SIZE_16:
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write16(step->reg, step->value);
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break;
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case REG_SCRIPT_SIZE_32:
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write32(step->reg, step->value);
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break;
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}
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}
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static uint32_t reg_script_read_res(struct reg_script_context *ctx)
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{
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struct resource *res;
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uint32_t val = 0;
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const struct reg_script *step = reg_script_get_step(ctx);
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res = reg_script_get_resource(ctx);
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if (res == NULL)
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return val;
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if (res->flags & IORESOURCE_IO) {
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const struct reg_script io_step = {
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.size = step->size,
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.reg = res->base + step->reg,
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};
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reg_script_set_step(ctx, &io_step);
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val = reg_script_read_io(ctx);
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}
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else if (res->flags & IORESOURCE_MEM) {
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const struct reg_script mmio_step = {
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.size = step->size,
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.reg = res->base + step->reg,
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};
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reg_script_set_step(ctx, &mmio_step);
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val = reg_script_read_mmio(ctx);
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}
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reg_script_set_step(ctx, step);
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return val;
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}
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static void reg_script_write_res(struct reg_script_context *ctx)
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{
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struct resource *res;
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const struct reg_script *step = reg_script_get_step(ctx);
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res = reg_script_get_resource(ctx);
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if (res == NULL)
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return;
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if (res->flags & IORESOURCE_IO) {
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const struct reg_script io_step = {
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.size = step->size,
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.reg = res->base + step->reg,
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.value = step->value,
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};
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reg_script_set_step(ctx, &io_step);
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reg_script_write_io(ctx);
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}
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else if (res->flags & IORESOURCE_MEM) {
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const struct reg_script mmio_step = {
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.size = step->size,
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.reg = res->base + step->reg,
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.value = step->value,
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};
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reg_script_set_step(ctx, &mmio_step);
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reg_script_write_mmio(ctx);
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}
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reg_script_set_step(ctx, step);
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}
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static uint32_t reg_script_read_iosf(struct reg_script_context *ctx)
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{
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#if CONFIG_SOC_INTEL_BAYTRAIL
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const struct reg_script *step = reg_script_get_step(ctx);
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switch (step->id) {
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case IOSF_PORT_BUNIT:
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return iosf_bunit_read(step->reg);
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case IOSF_PORT_DUNIT_CH0:
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return iosf_dunit_ch0_read(step->reg);
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case IOSF_PORT_PMC:
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return iosf_punit_read(step->reg);
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case IOSF_PORT_USBPHY:
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return iosf_usbphy_read(step->reg);
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case IOSF_PORT_USHPHY:
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return iosf_ushphy_read(step->reg);
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}
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#endif
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return 0;
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}
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static void reg_script_write_iosf(struct reg_script_context *ctx)
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{
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#if CONFIG_SOC_INTEL_BAYTRAIL
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const struct reg_script *step = reg_script_get_step(ctx);
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switch (step->id) {
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case IOSF_PORT_BUNIT:
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iosf_bunit_write(step->reg, step->value);
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break;
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case IOSF_PORT_DUNIT_CH0:
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iosf_dunit_write(step->reg, step->value);
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break;
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case IOSF_PORT_PMC:
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iosf_punit_write(step->reg, step->value);
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break;
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case IOSF_PORT_USBPHY:
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iosf_usbphy_write(step->reg, step->value);
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break;
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case IOSF_PORT_USHPHY:
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iosf_ushphy_write(step->reg, step->value);
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break;
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}
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#endif
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}
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static uint32_t reg_script_read(struct reg_script_context *ctx)
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{
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const struct reg_script *step = reg_script_get_step(ctx);
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switch (step->type) {
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case REG_SCRIPT_TYPE_PCI:
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return reg_script_read_pci(ctx);
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case REG_SCRIPT_TYPE_IO:
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return reg_script_read_io(ctx);
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case REG_SCRIPT_TYPE_MMIO:
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return reg_script_read_mmio(ctx);
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case REG_SCRIPT_TYPE_RES:
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return reg_script_read_res(ctx);
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case REG_SCRIPT_TYPE_IOSF:
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return reg_script_read_iosf(ctx);
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}
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return 0;
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}
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static void reg_script_write(struct reg_script_context *ctx)
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{
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const struct reg_script *step = reg_script_get_step(ctx);
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switch (step->type) {
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case REG_SCRIPT_TYPE_PCI:
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reg_script_write_pci(ctx);
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break;
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case REG_SCRIPT_TYPE_IO:
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reg_script_write_io(ctx);
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break;
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case REG_SCRIPT_TYPE_MMIO:
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reg_script_write_mmio(ctx);
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break;
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case REG_SCRIPT_TYPE_RES:
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reg_script_write_res(ctx);
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break;
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case REG_SCRIPT_TYPE_IOSF:
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reg_script_write_iosf(ctx);
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break;
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}
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}
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static void reg_script_rmw(struct reg_script_context *ctx)
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{
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uint32_t value;
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const struct reg_script *step = reg_script_get_step(ctx);
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struct reg_script write_step = *step;
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value = reg_script_read(ctx);
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value &= step->mask;
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value |= step->value;
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write_step.value = value;
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reg_script_set_step(ctx, &write_step);
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reg_script_write(ctx);
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reg_script_set_step(ctx, step);
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}
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/* In order to easily chain scripts together handle the REG_SCRIPT_COMMAND_NEXT
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* as recursive call with a new context that has the same dev and resource
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* as the previous one. That will run to completion and then move on to the
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* next step of the previous context. */
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static void reg_script_run_next(struct reg_script_context *ctx,
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const struct reg_script *step);
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static void reg_script_run_with_context(struct reg_script_context *ctx)
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{
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uint32_t value = 0, try;
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while (1) {
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const struct reg_script *step = reg_script_get_step(ctx);
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if (step->command == REG_SCRIPT_COMMAND_END)
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break;
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switch (step->command) {
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case REG_SCRIPT_COMMAND_READ:
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(void)reg_script_read(ctx);
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break;
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case REG_SCRIPT_COMMAND_WRITE:
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reg_script_write(ctx);
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break;
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case REG_SCRIPT_COMMAND_RMW:
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reg_script_rmw(ctx);
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break;
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case REG_SCRIPT_COMMAND_POLL:
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for (try = 0; try < step->timeout; try += POLL_DELAY) {
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value = reg_script_read(ctx) & step->mask;
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if (value == step->value)
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break;
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udelay(POLL_DELAY);
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}
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if (try >= step->timeout)
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printk(BIOS_WARNING, "%s: POLL timeout waiting "
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"for 0x%08x to be 0x%08x, got 0x%08x\n",
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__func__, step->reg, step->value, value);
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break;
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case REG_SCRIPT_COMMAND_SET_DEV:
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reg_script_set_dev(ctx, step->dev);
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break;
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case REG_SCRIPT_COMMAND_NEXT:
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reg_script_run_next(ctx, step->next);
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break;
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default:
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printk(BIOS_WARNING, "Invalid command: %08x\n",
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step->command);
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break;
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}
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reg_script_set_step(ctx, step + 1);
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}
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}
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static void reg_script_run_next(struct reg_script_context *prev_ctx,
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const struct reg_script *step)
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{
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struct reg_script_context ctx;
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/* Use prev context as a basis but start at a new step. */
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ctx = *prev_ctx;
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reg_script_set_step(&ctx, step);
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reg_script_run_with_context(&ctx);
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}
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void reg_script_run(const struct reg_script *step)
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{
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struct reg_script_context ctx;
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reg_script_set_dev(&ctx, EMPTY_DEV);
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reg_script_set_step(&ctx, step);
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reg_script_run_with_context(&ctx);
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}
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