soc/amd/{common,cezanne}: Implement HAVE_PAYLOAD_PRELOAD_CACHE

This change allows preloading the payload.

BUG=b:179699789
TEST=Boot guybrush and see payload read/decompress drop by 20 ms. We
now spend 7ms decompression from RAM. By switching to LZ4 we drop that
to 500us.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I3ec78e628f24f2ba0c9fcf2a9e3bde64687eec44
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56053
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

src/soc/amd/cezanne/Kconfig

@@ -31,6 +31,7 @@ config SOC_SPECIFIC_OPTIONS
 	select IDT_IN_EVERY_STAGE
 	select IOAPIC
 	select PARALLEL_MP_AP_WORK
+	select PAYLOAD_PRELOAD
 	select PLATFORM_USES_FSP2_0
 	select PROVIDES_ROM_SHARING
 	select RESET_VECTOR_IN_RAM