libpayload arm64: Remove the DONT_USE_DC macro
By default we dont want to use the special DC instruction. Thus getting rid of the DONT_USE_DC macro and enabling code appropriately in memset.S BUG=chrome-os-partner:31634 BRANCH=None TEST=Compiles successfully and memset works fine for mmu init Change-Id: Icb3193f4f0d122726dcdacbdcacbf53eba30e235 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 54f639ef2348acab54e32b18f6826a67bf52bc14 Original-Change-Id: Id89ec2c1731d21496eca617a3c03abaf48062908 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/216820 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8787 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
committed by
Patrick Georgi
parent
c10e7f2de9
commit
732f5b5597
@@ -31,16 +31,6 @@
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*
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*/
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/* By default we assume that the DC instruction can be used to zero
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data blocks more efficiently. In some circumstances this might be
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unsafe, for example in an asymmetric multiprocessor environment with
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different DC clear lengths (neither the upper nor lower lengths are
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safe to use). The feature can be disabled by defining DONT_USE_DC.
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If code may be run in a virtualized environment, then define
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MAYBE_VIRT. This will cause the code to cache the system register
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values rather than re-reading them each call. */
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#define dstin x0
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#define val w1
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#define count x2
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@@ -57,7 +47,6 @@
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#define dst x8
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#define tmp3w w9
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.macro def_fn f p2align=0
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.text
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.p2align \p2align
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@@ -70,9 +59,6 @@ def_fn memset p2align=6
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mov dst, dstin /* Preserve return value. */
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ands A_lw, val, #255
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#ifndef DONT_USE_DC
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b.eq .Lzero_mem
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#endif
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orr A_lw, A_lw, A_lw, lsl #8
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orr A_lw, A_lw, A_lw, lsl #16
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orr A_l, A_l, A_l, lsl #32
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@@ -148,95 +134,3 @@ def_fn memset p2align=6
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add dst, dst, #16
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b.ne .Ltail63
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ret
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#ifndef DONT_USE_DC
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/* For zeroing memory, check to see if we can use the ZVA feature to
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* zero entire 'cache' lines. */
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.Lzero_mem:
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mov A_l, #0
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cmp count, #63
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b.le .Ltail_maybe_tiny
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neg tmp2, dst
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ands tmp2, tmp2, #15
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b.eq 1f
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sub count, count, tmp2
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stp A_l, A_l, [dst]
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add dst, dst, tmp2
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cmp count, #63
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b.le .Ltail63
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1:
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/* For zeroing small amounts of memory, it's not worth setting up
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* the line-clear code. */
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cmp count, #128
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b.lt .Lnot_short
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#ifdef MAYBE_VIRT
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/* For efficiency when virtualized, we cache the ZVA capability. */
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adrp tmp2, .Lcache_clear
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ldr zva_len, [tmp2, #:lo12:.Lcache_clear]
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tbnz zva_len, #31, .Lnot_short
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cbnz zva_len, .Lzero_by_line
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mrs tmp1, dczid_el0
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tbz tmp1, #4, 1f
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/* ZVA not available. Remember this for next time. */
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mov zva_len, #~0
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str zva_len, [tmp2, #:lo12:.Lcache_clear]
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b .Lnot_short
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1:
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mov tmp3w, #4
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and zva_len, tmp1w, #15 /* Safety: other bits reserved. */
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lsl zva_len, tmp3w, zva_len
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str zva_len, [tmp2, #:lo12:.Lcache_clear]
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#else
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mrs tmp1, dczid_el0
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tbnz tmp1, #4, .Lnot_short
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mov tmp3w, #4
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and zva_len, tmp1w, #15 /* Safety: other bits reserved. */
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lsl zva_len, tmp3w, zva_len
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#endif
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.Lzero_by_line:
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/* Compute how far we need to go to become suitably aligned. We're
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* already at quad-word alignment. */
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cmp count, zva_len_x
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b.lt .Lnot_short /* Not enough to reach alignment. */
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sub zva_bits_x, zva_len_x, #1
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neg tmp2, dst
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ands tmp2, tmp2, zva_bits_x
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b.eq 1f /* Already aligned. */
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/* Not aligned, check that there's enough to copy after alignment. */
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sub tmp1, count, tmp2
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cmp tmp1, #64
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ccmp tmp1, zva_len_x, #8, ge /* NZCV=0b1000 */
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b.lt .Lnot_short
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/* We know that there's at least 64 bytes to zero and that it's safe
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* to overrun by 64 bytes. */
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mov count, tmp1
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2:
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stp A_l, A_l, [dst]
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stp A_l, A_l, [dst, #16]
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stp A_l, A_l, [dst, #32]
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subs tmp2, tmp2, #64
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stp A_l, A_l, [dst, #48]
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add dst, dst, #64
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b.ge 2b
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/* We've overrun a bit, so adjust dst downwards. */
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add dst, dst, tmp2
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1:
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sub count, count, zva_len_x
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3:
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dc zva, dst
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add dst, dst, zva_len_x
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subs count, count, zva_len_x
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b.ge 3b
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ands count, count, zva_bits_x
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b.ne .Ltail_maybe_long
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ret
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.size memset, .-memset
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#ifdef MAYBE_VIRT
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.bss
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.p2align 2
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.Lcache_clear:
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.space 4
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#endif
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#endif /* DONT_USE_DC */
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