soc/intel: Fix typo in comment
rotine ---> routine Change-Id: I21a71f52d2ec7a05ea3dadf30e8f3e8dac07d168 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52106 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
parent
84d10cc5d3
commit
73a22edcc8
@ -5,7 +5,7 @@
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
* Routine to perform below operations:
|
* Routine to perform below operations:
|
||||||
* 1. SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register
|
* 1. SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register
|
||||||
* 2. Program GPIO PM configuration based on PM mask and value
|
* 2. Program GPIO PM configuration based on PM mask and value
|
||||||
*/
|
*/
|
||||||
void soc_gpio_pm_configuration(void)
|
void soc_gpio_pm_configuration(void)
|
||||||
|
@ -98,7 +98,7 @@ const char *soc_acpi_name(const struct device *dev)
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */
|
/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
|
||||||
static void soc_fill_gpio_pm_configuration(void)
|
static void soc_fill_gpio_pm_configuration(void)
|
||||||
{
|
{
|
||||||
uint8_t value[TOTAL_GPIO_COMM];
|
uint8_t value[TOTAL_GPIO_COMM];
|
||||||
|
@ -88,7 +88,7 @@ const char *soc_acpi_name(const struct device *dev)
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */
|
/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
|
||||||
static void soc_fill_gpio_pm_configuration(void)
|
static void soc_fill_gpio_pm_configuration(void)
|
||||||
{
|
{
|
||||||
uint8_t value[TOTAL_GPIO_COMM];
|
uint8_t value[TOTAL_GPIO_COMM];
|
||||||
|
@ -104,7 +104,7 @@ const char *soc_acpi_name(const struct device *dev)
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */
|
/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
|
||||||
static void soc_fill_gpio_pm_configuration(void)
|
static void soc_fill_gpio_pm_configuration(void)
|
||||||
{
|
{
|
||||||
uint8_t value[TOTAL_GPIO_COMM];
|
uint8_t value[TOTAL_GPIO_COMM];
|
||||||
|
@ -109,7 +109,7 @@ const char *soc_acpi_name(const struct device *dev)
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */
|
/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
|
||||||
static void soc_fill_gpio_pm_configuration(void)
|
static void soc_fill_gpio_pm_configuration(void)
|
||||||
{
|
{
|
||||||
uint8_t value[TOTAL_GPIO_COMM];
|
uint8_t value[TOTAL_GPIO_COMM];
|
||||||
|
Loading…
x
Reference in New Issue
Block a user