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sb/intel/lynxpoint: Fix 16-bit read/write PCI_COMMAND register

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Change-Id: I81b740e0cfcf0e1bf096427b45ffba06d357fee6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40792
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Elyes HAOUAS
2020-04-28 10:13:05 +02:00
committed by Patrick Georgi
parent 8b6dfdeb20
commit 73ae076e95
8 changed files with 27 additions and 48 deletions
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5
src/southbridge/intel/lynxpoint/serialio.c
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@@ -134,14 +134,11 @@ static void serialio_init(struct device *dev)
struct southbridge_intel_lynxpoint_config *config = dev->chip_info;
struct resource *bar0, *bar1;
int sio_index = -1;
u32 reg32;
printk(BIOS_DEBUG, "Initializing Serial IO device\n");
/* Ensure memory and bus master are enabled */
reg32 = pci_read_config32(dev, PCI_COMMAND);
reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_config32(dev, PCI_COMMAND, reg32);
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MEMORY);
/* Find BAR0 and BAR1 */
bar0 = find_resource(dev, PCI_BASE_ADDRESS_0);