arm64: Remove set_cntfrq() function

CNTFRQ_EL0 is a normal AArch64 architectural register like hundreds of
others that are all accessed through the raw_(read|write)_${register}()
family of functions. There's no reason why this register in particular
should have an inconsistent accessor, so replace all instances of
set_cntfrq() with raw_write_cntfrq_el0() and get rid of it.

Change-Id: I599519ba71c287d4085f9ad28d7349ef0b1eea9b
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/27947
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/cavium/cn81xx/timer.c

@@ -17,6 +17,7 @@
  */
 
 #include <arch/io.h>
+#include <arch/lib_helpers.h>
 #include <console/console.h>
 #include <inttypes.h>
 #include <soc/clock.h>
@@ -25,7 +26,6 @@
 #include <timer.h>
 #include <soc/addressmap.h>
 #include <assert.h>
-#include <arch/clock.h>
 
 /* Global System Timers Unit (GTI) registers */
 struct cn81xx_timer {
@@ -131,7 +131,7 @@ void init_timer(void)
 
 void soc_timer_init(void)
 {
-	set_cntfrq(tickrate);
+	raw_write_cntfrq_el0(tickrate);
 }
 
 /**

src/soc/nvidia/tegra210/ramstage.c

@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/clock.h>
 #include <arch/cpu.h>
+#include <arch/lib_helpers.h>
 #include <arch/stages.h>
 #include <gic.h>
 #include <soc/addressmap.h>
@@ -26,7 +26,7 @@ static void arm64_arch_timer_init(void)
 {
 	uint32_t freq = clock_get_osc_khz() * 1000;
 	// Set the cntfrq register.
-	set_cntfrq(freq);
+	raw_write_cntfrq_el0(freq);
 }
 
 static void mselect_enable_wrap(void)