sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

src/amd/stoneyridge: Fix a typo (EDGEL_TRIG -> EDGE_TRIG)

Browse Source 
Fixes: 2269a3c328 ("soc/amd/stoneyridge: Add functions for GPIO interrupts")
Change-Id: I5730259bc6819defc482d31644e1f476679257b2
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25588
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Chris Ching <chingcodes@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jonathan Neuschäfer
2018-04-08 15:05:12 +02:00
committed by Martin Roth
parent f42c7d9670
commit 73cd7cf0f2
2 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/kahlee/bootblock/bootblock.c
View File

@@ -39,7 +39,7 @@ void bootblock_mainboard_init(void)
/* Configure cr50 interrupt pin for use in polling tpm status */
if (IS_ENABLED(CONFIG_MAINBOARD_HAS_TPM_CR50)) {
const uint32_t flags = GPIO_EDGEL_TRIG | GPIO_ACTIVE_LOW |
const uint32_t flags = GPIO_EDGE_TRIG | GPIO_ACTIVE_LOW |
GPIO_INT_STATUS_EN;
gpio_set_interrupt(H1_PCH_INT, flags);
}

2
src/soc/amd/stoneyridge/include/soc/gpio.h
View File

@@ -23,7 +23,7 @@
#include <soc/iomap.h>
#include <types.h>
#define GPIO_EDGEL_TRIG (0 << 8)
#define GPIO_EDGE_TRIG (0 << 8)
#define GPIO_LEVEL_TRIG (1 << 8)
#define GPIO_TRIGGER_MASK (1 << 8)