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We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.

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As both ioapic.h and acpi.h define a macro named "NMI", rename one
of them (NMI -> NMIType in acpi.h).

Abuild-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann
2010-10-12 17:34:08 +00:00
parent 4ffde94c4e
commit 74d1a6e8a1
104 changed files with 177 additions and 163 deletions
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2
src/southbridge/amd/amd8111/amd8111_lpc.c
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@@ -101,7 +101,7 @@ static void amd8111_lpc_read_resources(device_t dev)
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
res = new_resource(dev, 3); /* IOAPIC */
res->base = 0xfec00000;
res->base = IO_APIC_ADDR;
res->size = 0x00001000;
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}

3
src/southbridge/amd/cs5530/cs5530_isa.c
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@@ -20,6 +20,7 @@
#include <console/console.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
@@ -38,7 +39,7 @@ static void cs5530_read_resources(device_t dev)
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
res = new_resource(dev, 3); /* IOAPIC */
res->base = 0xfec00000;
res->base = IO_APIC_ADDR;
res->size = 0x00001000;
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}

3
src/southbridge/amd/cs5535/cs5535.c
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@@ -1,5 +1,6 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
@@ -82,7 +83,7 @@ static void cs5535_read_resources(device_t dev)
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
res = new_resource(dev, 3); /* IOAPIC */
res->base = 0xfec00000;
res->base = IO_APIC_ADDR;
res->size = 0x00001000;
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}

3
src/southbridge/amd/cs5536/cs5536.c
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@@ -18,6 +18,7 @@
*/
#include <arch/io.h>
#include <arch/ioapic.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
@@ -656,7 +657,7 @@ static void cs5536_read_resources(device_t dev)
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
res = new_resource(dev, 3); /* IOAPIC */
res->base = 0xfec00000;
res->base = IO_APIC_ADDR;
res->size = 0x00001000;
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}

3
src/southbridge/amd/sb600/sb600_lpc.c
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@@ -27,6 +27,7 @@
#include <pc80/isa-dma.h>
#include <bitops.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include "sb600.h"
static void lpc_init(device_t dev)
@@ -84,7 +85,7 @@ static void sb600_lpc_read_resources(device_t dev)
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
res = new_resource(dev, 3); /* IOAPIC */
res->base = 0xfec00000;
res->base = IO_APIC_ADDR;
res->size = 0x00001000;
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

2
src/southbridge/amd/sb600/sb600_sm.c
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@@ -302,7 +302,7 @@ static void sb600_sm_read_resources(device_t dev)
/* apic */
res = new_resource(dev, 0x74);
res->base = 0xfec00000;
res->base = IO_APIC_ADDR;
res->size = 256 * 0x10;
res->limit = 0xFFFFFFFFUL; /* res->base + res->size -1; */
res->align = 8;

3
src/southbridge/amd/sb700/sb700_lpc.c
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@@ -27,6 +27,7 @@
#include <pc80/isa-dma.h>
#include <bitops.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include "sb700.h"
static void lpc_init(device_t dev)
@@ -87,7 +88,7 @@ static void sb700_lpc_read_resources(device_t dev)
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
res = new_resource(dev, 3); /* IOAPIC */
res->base = 0xfec00000;
res->base = IO_APIC_ADDR;
res->size = 0x00001000;
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

2
src/southbridge/amd/sb700/sb700_sm.c
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@@ -308,7 +308,7 @@ static void sb700_sm_read_resources(device_t dev)
/* apic */
res = new_resource(dev, 0x74);
res->base = 0xfec00000;
res->base = IO_APIC_ADDR;
res->size = 256 * 0x10;
res->limit = 0xFFFFFFFFUL; /* res->base + res->size -1; */
res->align = 8;