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drivers/amd/agesa: Don't save regular boot MTRR to flash

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Save the regular boot MTRRs that are restored on the S3 path during
the CPU init in cbmem instead of storing them to the SPI flash.

This was probably done because historically this code run with late
cbmem init (in ramstage).

TESTED on pcengines/apu1 and lenovo/g505s: S3 resume works fine.

Change-Id: Ia58e7cd1afb785ba0c379ba75ef6090b56cb9dc6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44294
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Arthur Heymans
2020-08-07 22:12:09 +02:00
committed by Michał Żygowski
parent df3d97e821
commit 750d57ff5d
5 changed files with 21 additions and 53 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h
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@@ -11,6 +11,7 @@
#define CBMEM_ID_ACPI_UCSI 0x55435349
#define CBMEM_ID_AFTER_CAR 0xc4787a93
#define CBMEM_ID_AGESA_RUNTIME 0x41474553
#define CBMEM_ID_AGESA_MTRR 0xf08b4b9d
#define CBMEM_ID_AMDMCT_MEMINFO 0x494D454E
#define CBMEM_ID_CAR_GLOBALS 0xcac4e6a3
#define CBMEM_ID_CBTABLE 0x43425442
@@ -89,6 +90,7 @@
{ CBMEM_ID_ACPI_HEST, "ACPI HEST " }, \
{ CBMEM_ID_ACPI_UCSI, "ACPI UCSI " }, \
{ CBMEM_ID_AGESA_RUNTIME, "AGESA RSVD " }, \
{ CBMEM_ID_AGESA_MTRR, "AGESA MTRR " }, \
{ CBMEM_ID_AFTER_CAR, "AFTER CAR " }, \
{ CBMEM_ID_AMDMCT_MEMINFO, "AMDMEM INFO" }, \
{ CBMEM_ID_CAR_GLOBALS, "CAR GLOBALS" }, \