soc/intel/xeon_sp/acpi.c Loop over HOB stack for MADT generation
To align MADT generation with DMAR, we loop over HOB entries instead of over copied HOB entries fetched from get_iio_stacks(). This makes it easier to see what is going on. Tested on ocp/deltalake Change-Id: I8ffe0322bb182b7ec5887354ec801e1f9f3d3288 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47300 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
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@@ -73,12 +73,12 @@ static unsigned long acpi_madt_irq_overrides(unsigned long current)
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return current;
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}
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static unsigned long add_madt_ioapic(unsigned long current, int stack, int ioapic_id,
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uint32_t ioapic_base, int gsi_base)
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static unsigned long add_madt_ioapic(unsigned long current, int socket, int stack,
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int ioapic_id, uint32_t ioapic_base, int gsi_base)
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{
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printk(BIOS_DEBUG, "Adding MADT IOAPIC for stack: %d, ioapic_id: 0x%x, "
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printk(BIOS_DEBUG, "Adding MADT IOAPIC for socket: %d, stack: %d, ioapic_id: 0x%x, "
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"ioapic_base: 0x%x, gsi_base: 0x%x\n",
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stack, ioapic_id, ioapic_base, gsi_base);
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socket, stack, ioapic_id, ioapic_base, gsi_base);
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return acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, ioapic_id,
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ioapic_base, gsi_base);
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}
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@@ -86,7 +86,7 @@ static unsigned long add_madt_ioapic(unsigned long current, int stack, int ioapi
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unsigned long acpi_fill_madt(unsigned long current)
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{
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int cur_index;
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struct iiostack_resource stack_info = {0};
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const IIO_UDS *hob = get_iio_uds();
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/* With XEON-SP FSP, PCH IOAPIC is allocated with first 120 GSIs. */
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#if (CONFIG(SOC_INTEL_COOPERLAKE_SP))
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@@ -102,30 +102,34 @@ unsigned long acpi_fill_madt(unsigned long current)
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current = xeonsp_acpi_create_madt_lapics(current);
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cur_index = 0;
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get_iiostack_info(&stack_info);
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for (int stack = 0; stack < stack_info.no_of_stacks; ++stack) {
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const STACK_RES *ri = &stack_info.res[stack];
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assert(cur_index < ARRAY_SIZE(ioapic_ids));
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assert(cur_index < ARRAY_SIZE(gsi_bases));
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int ioapic_id = ioapic_ids[cur_index];
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int gsi_base = gsi_bases[cur_index];
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current += add_madt_ioapic(current, stack, ioapic_id, ri->IoApicBase,
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gsi_base);
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++cur_index;
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/*
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* Stack 0 has non-PCH IOAPIC and PCH IOAPIC.
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* Add entry for PCH IOAPIC.
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*/
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if (stack == 0) { /* PCH IOAPIC */
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for (int socket = 0; socket < hob->PlatformData.numofIIO; ++socket) {
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for (int stack = 0; stack < MAX_IIO_STACK; ++stack) {
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const STACK_RES *ri =
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&hob->PlatformData.IIO_resource[socket].StackRes[stack];
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if (!is_iio_stack_res(ri))
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continue;
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assert(cur_index < ARRAY_SIZE(ioapic_ids));
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assert(cur_index < ARRAY_SIZE(gsi_bases));
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ioapic_id = ioapic_ids[cur_index];
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gsi_base = gsi_bases[cur_index];
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current += add_madt_ioapic(current, stack, ioapic_id,
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ri->IoApicBase + 0x1000, gsi_base);
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int ioapic_id = ioapic_ids[cur_index];
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int gsi_base = gsi_bases[cur_index];
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current += add_madt_ioapic(current, socket, stack, ioapic_id,
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ri->IoApicBase, gsi_base);
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++cur_index;
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/*
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* Stack 0 has non-PCH IOAPIC and PCH IOAPIC.
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* Add entry for PCH IOAPIC.
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*/
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if (stack == 0 && socket == 0) { /* PCH IOAPIC */
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assert(cur_index < ARRAY_SIZE(ioapic_ids));
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assert(cur_index < ARRAY_SIZE(gsi_bases));
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ioapic_id = ioapic_ids[cur_index];
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gsi_base = gsi_bases[cur_index];
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current += add_madt_ioapic(current, socket, stack, ioapic_id,
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ri->IoApicBase + 0x1000, gsi_base);
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++cur_index;
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}
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}
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}
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