coreboot: config to cache ramstage outside CBMEM
Haswell was the original chipset to store the cache in another area besides CBMEM. However, it was specific to the implementation. Instead, provide a generic way to obtain the location of the ramstage cache. This option is selected using the CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM Kconfig option. BUG=chrome-os-partner:23249 BRANCH=None TEST=Built and booted with baytrail support. Also built for falco successfully. Change-Id: I70d0940f7a8f73640c92a75fd22588c2c234241b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/172602 Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/4876 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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Aaron Durbin
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49
src/include/ramstage_cache.h
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49
src/include/ramstage_cache.h
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef _RAMSTAGE_CACHE_
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#define _RAMSTAGE_CACHE_
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#if !defined(__PRE_RAM__)
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#error "ramstage_cache only used in romstage for loading ramstage."
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#endif
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/* This structure is saved along with the relocated ramstage program when
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* CONFIG_RELOCATED_RAMSTAGE is employed. For x86, it can used to protect
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* the integrity of the ramstage program on S3 resume by saving a copy of
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* the relocated ramstage in SMM space with the assumption that the SMM region
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* cannot be altered from the OS. The magic value just serves as a quick sanity
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* check. */
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#define RAMSTAGE_CACHE_MAGIC 0xf3c3a02a
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struct ramstage_cache {
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uint32_t magic;
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uint32_t entry_point;
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uint32_t load_address;
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uint32_t size;
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char program[0];
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} __attribute__((packed));
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/* Chipset/Board function for obtaining cache location and size. */
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struct ramstage_cache *ramstage_cache_location(long *size);
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/* Chipset/Board function called when cache is invalid on resume. */
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void ramstage_cache_invalid(struct ramstage_cache *cache);
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#endif /* _RAMSTAGE_CACHE_ */
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